X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=doc%2Fopenocd.texi;h=069367d91ade58d16271afc6d263331d6f828a5d;hb=c73342fbe77b0d0432ce189566e0e8383f2b7493;hp=fd92d51acfcca70ac993859f1e866cdc9032b378;hpb=ff640f197a9a343b2f3ed10e9174e35282334e8c;p=fw%2Fopenocd

diff --git a/doc/openocd.texi b/doc/openocd.texi
index fd92d51ac..069367d91 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -526,7 +526,7 @@ OpenOCD mailing list.
 @item @b{Jim vs. Tcl}
 @* Jim-Tcl is a stripped down version of the well known Tcl language,
 which can be found here: @url{http://www.tcl.tk}. Jim-Tcl has far
-fewer features. Jim-Tcl is a single .C file and a single .H file and
+fewer features. Jim-Tcl is several dozens of .C files and .H files and
 implements the basic Tcl command set. In contrast: Tcl 8.6 is a
 4.2 MB .zip file containing 1540 files. 
 
@@ -676,8 +676,6 @@ setting from within a telnet or gdb session using @command{debug_level
 You can redirect all output from the daemon to a file using the
 @option{-l <logfile>} switch.
 
-For details on the @option{-p} option. @xref{Connecting to GDB}.
-
 Note! OpenOCD will launch the GDB & telnet server even if it can not
 establish a connection with the target. In general, it is possible for
 the JTAG controller to be unresponsive until the target is set up
@@ -1279,7 +1277,7 @@ at91sam3u4c.cfg  lm3s9b9x.cfg  samsung_s3c6410.cfg
 at91sam3u4e.cfg  lpc1768.cfg   sharp_lh79532.cfg
 at91sam3uXX.cfg  lpc2103.cfg   smdk6410.cfg
 at91sam7sx.cfg   lpc2124.cfg   smp8634.cfg
-at91sam9260.cfg  lpc2129.cfg   stm32.cfg
+at91sam9260.cfg  lpc2129.cfg   stm32f1x.cfg
 c100.cfg         lpc2148.cfg   str710.cfg
 c100config.tcl   lpc2294.cfg   str730.cfg
 c100helper.tcl   lpc2378.cfg   str750.cfg
@@ -4764,44 +4762,51 @@ applied to all of them.
 @end quotation
 @end deffn
 
-@deffn {Flash Driver} stm32x
-All members of the STM32 microcontroller family from ST Microelectronics
+@deffn {Flash Driver} stm32f1x
+All members of the STM32f1x microcontroller family from ST Microelectronics
 include internal flash and use ARM Cortex M3 cores.
 The driver automatically recognizes a number of these chips using
 the chip identification register, and autoconfigures itself.
 
 @example
-flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
 @end example
 
-Some stm32x-specific commands
-@footnote{Currently there is a @command{stm32x mass_erase} command.
+Some stm32f1x-specific commands
+@footnote{Currently there is a @command{stm32f1x mass_erase} command.
 That seems pointless since the same effect can be had using the
 standard @command{flash erase_address} command.}
 are defined:
 
-@deffn Command {stm32x lock} num
+@deffn Command {stm32f1x lock} num
 Locks the entire stm32 device.
 The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
 
-@deffn Command {stm32x unlock} num
+@deffn Command {stm32f1x unlock} num
 Unlocks the entire stm32 device.
 The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
 
-@deffn Command {stm32x options_read} num
+@deffn Command {stm32f1x options_read} num
 Read and display the stm32 option bytes written by
-the @command{stm32x options_write} command.
+the @command{stm32f1x options_write} command.
 The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
 
-@deffn Command {stm32x options_write} num (@option{SWWDG}|@option{HWWDG}) (@option{RSTSTNDBY}|@option{NORSTSTNDBY}) (@option{RSTSTOP}|@option{NORSTSTOP})
+@deffn Command {stm32f1x options_write} num (@option{SWWDG}|@option{HWWDG}) (@option{RSTSTNDBY}|@option{NORSTSTNDBY}) (@option{RSTSTOP}|@option{NORSTSTOP})
 Writes the stm32 option byte with the specified values.
 The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
 @end deffn
 
+@deffn {Flash Driver} stm32f2x
+All members of the STM32f2x microcontroller family from ST Microelectronics
+include internal flash and use ARM Cortex M3 cores.
+The driver automatically recognizes a number of these chips using
+the chip identification register, and autoconfigures itself.
+@end deffn
+
 @deffn {Flash Driver} str7x
 All members of the STR7 microcontroller family from ST Microelectronics
 include internal flash and use ARM7TDMI cores.
@@ -4884,6 +4889,19 @@ flash bank vbank1 virtual 0x9fc00000 0 0 0 $_TARGETNAME $_FLASHNAME
 @end example
 @end deffn
 
+@deffn {Flash Driver} fm3
+All members of the FM3 microcontroller family from Fujitsu
+include internal flash and use ARM Cortex M3 cores.
+The @var{fm3} driver uses the @var{target} parameter to select the
+correct bank config, it can currently be one of the following:
+@code{mb9bfxx1.cpu}, @code{mb9bfxx2.cpu}, @code{mb9bfxx3.cpu},
+@code{mb9bfxx4.cpu}, @code{mb9bfxx5.cpu} or @code{mb9bfxx6.cpu}.
+	
+@example
+flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
+@end example
+@end deffn
+
 @subsection str9xpec driver
 @cindex str9xpec