X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=device%2Flib%2Fpic%2Flibdev%2Fpic16f84a.c;h=edd87f97965b12add8c29a6417ab61b4bfb72a0c;hb=1bb6a9b476754a7dd750c60972bbefe75c218f68;hp=71de3d10ee2341aff715e8f4f0959302cde65e9c;hpb=5682577164cf23e4c6663decdfcad7846d0aa10c;p=fw%2Fsdcc

diff --git a/device/lib/pic/libdev/pic16f84a.c b/device/lib/pic/libdev/pic16f84a.c
index 71de3d10..edd87f97 100644
--- a/device/lib/pic/libdev/pic16f84a.c
+++ b/device/lib/pic/libdev/pic16f84a.c
@@ -1,13 +1,13 @@
 /* Register definitions for pic16f84a.
  * This file was automatically generated by:
- *   inc2h.pl V1.6
+ *   inc2h.pl V4585
  *   Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
  */
 #include <pic16f84a.h>
 
-__data __at (INDF_ADDR) volatile char      INDF;
+__sfr  __at (INDF_ADDR)                    INDF;
 __sfr  __at (TMR0_ADDR)                    TMR0;
-__data __at (PCL_ADDR) volatile char       PCL;
+__sfr  __at (PCL_ADDR)                     PCL;
 __sfr  __at (STATUS_ADDR)                  STATUS;
 __sfr  __at (FSR_ADDR)                     FSR;
 __sfr  __at (PORTA_ADDR)                   PORTA;
@@ -28,5 +28,9 @@ __sfr  __at (EECON2_ADDR)                  EECON2;
 volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
+volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
+volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
+volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;