X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=device%2Flib%2Fpic%2Flibdev%2Fpic16f685.c;h=5b5b07e8547fa3147486c23c0fd77a83a4ca445a;hb=d1509cf37c6ba9cc5aa238fcce11824efefc7941;hp=fe0a74c764f51cc46b1bcf0003c779567d9a47ca;hpb=14fbdef91206e1fa14b6fedf1b013cbba1021124;p=fw%2Fsdcc

diff --git a/device/lib/pic/libdev/pic16f685.c b/device/lib/pic/libdev/pic16f685.c
index fe0a74c7..5b5b07e8 100644
--- a/device/lib/pic/libdev/pic16f685.c
+++ b/device/lib/pic/libdev/pic16f685.c
@@ -1,6 +1,6 @@
 /* Register definitions for pic16f685.
  * This file was automatically generated by:
- *   inc2h.pl V1.6
+ *   inc2h.pl V4514
  *   Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
  */
 #include <pic16f685.h>
@@ -67,12 +67,18 @@ __sfr  __at (SRCON_ADDR)                   SRCON;
 // bitfield definitions
 // 
 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
+volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
+volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
 volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
 volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits;
 volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits;
 volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits;
 volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits;
+volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
+volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
+volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits;
+volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
 volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
 volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
@@ -81,7 +87,12 @@ volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
 volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
 volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
+volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
+volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
+volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits;
 volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits;
+volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits;
 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
 volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
@@ -90,5 +101,6 @@ volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
 volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
 volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
 volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
+volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits;
 volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;