X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=device%2Flib%2F_divuint.c;h=8d1344f48ad192d556c93e5f423acb385d54e971;hb=1bb6a9b476754a7dd750c60972bbefe75c218f68;hp=f85aa8a250cbf56100c1efbc71f35c7e109096c5;hpb=e06463c2f7f7e77ad74ce0319288798cfbed3e0d;p=fw%2Fsdcc diff --git a/device/lib/_divuint.c b/device/lib/_divuint.c index f85aa8a2..8d1344f4 100644 --- a/device/lib/_divuint.c +++ b/device/lib/_divuint.c @@ -27,6 +27,8 @@ mcs51 small stack-auto */ +#include + #if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) # if defined(SDCC_mcs51) # if defined(SDCC_MODEL_SMALL) @@ -42,98 +44,103 @@ #if defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO static void -_divuint_dummy (void) _naked +_divuint_dummy (void) __naked { - _asm - - .globl __divuint + __asm - __divuint: + .globl __divuint - #define count r2 - #define reste_l r3 - #define reste_h r4 - #define al dpl - #define ah dph +__divuint: -#ifdef SDCC_STACK_AUTO + #define count r2 + #define reste_l r3 + #define reste_h r4 + #define xl dpl + #define xh dph - ar0 = 0 ; BUG register set is not considered - ar1 = 1 +#if defined(SDCC_PARMS_IN_BANK1) + #define yl (b1_0) + #define yh (b1_1) +#else // SDCC_PARMS_IN_BANK1 + #if defined(SDCC_STACK_AUTO) - .globl __divint + .globl __divint - mov a,sp - add a,#-2 ; 2 bytes return address - mov r0,a ; r0 points to bh - mov ar1,@r0 ; load bh - dec r0 - mov ar0,@r0 ; load bl + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to yh + mov a,@r0 ; load yh + mov r1,a + dec r0 + mov a,@r0 ; load yl + mov r0,a - #define bl r0 - #define bh r1 + #define yl r0 + #define yh r1 - __divint: ; entry point for __divsint +__divint: ; entry point for __divsint -#else // SDCC_STACK_AUTO + #else // SDCC_STACK_AUTO -#if defined(SDCC_NOOVERLAY) // BUG SDCC_NOOVERLAY is not set by -no-overlay - .area DSEG (DATA) -#else - .area OSEG (OVR,DATA) -#endif + #if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) + #else + .area OSEG (OVR,DATA) + #endif - .globl __divuint_PARM_2 - .globl __divsint_PARM_2 + .globl __divuint_PARM_2 + .globl __divsint_PARM_2 - __divuint_PARM_2: - __divsint_PARM_2: - .ds 2 +__divuint_PARM_2: +__divsint_PARM_2: + .ds 2 - .area CSEG (CODE) + .area CSEG (CODE) - #define bl (__divuint_PARM_2) - #define bh (__divuint_PARM_2 + 1) + #define yl (__divuint_PARM_2) + #define yh (__divuint_PARM_2 + 1) -#endif // SDCC_STACK_AUTO + #endif // SDCC_STACK_AUTO +#endif // SDCC_PARMS_IN_BANK1 - mov count,#16 - clr a - mov reste_l,a - mov reste_h,a + mov count,#16 + clr a + mov reste_l,a + mov reste_h,a - loop: mov a,al ; a <<= 1 - add a,acc - mov al,a - mov a,ah - rlc a - mov ah,a +loop: + mov a,xl ; x <<= 1 + add a,acc + mov xl,a + mov a,xh + rlc a + mov xh,a - mov a,reste_l ; reste <<= 1 - rlc a ; feed in carry - mov reste_l,a - mov a,reste_h - rlc a - mov reste_h,a + mov a,reste_l ; reste <<= 1 + rlc a ; feed in carry + mov reste_l,a + mov a,reste_h + rlc a + mov reste_h,a - mov a,reste_l ; reste - b - subb a,bl ; here carry is always clear, because + mov a,reste_l ; reste - y + subb a,yl ; here carry is always clear, because ; reste <<= 1 never overflows - mov b,a - mov a,reste_h - subb a,bh + mov b,a + mov a,reste_h + subb a,yh - jc smaller ; reste >= b? + jc smaller ; reste >= y? - mov reste_h,a ; -> yes; reste = reste - b; - mov reste_l,b - orl al,#1 - smaller: ; -> no - djnz count,loop - ret + mov reste_h,a ; -> yes; reste = reste - y; + mov reste_l,b + orl xl,#1 +smaller: ; -> no + djnz count,loop + ret - _endasm ; + __endasm; } #else // defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO @@ -141,34 +148,30 @@ _divuint_dummy (void) _naked #define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) unsigned int -_divuint (unsigned int a, unsigned int b) +_divuint (unsigned int x, unsigned int y) { unsigned int reste = 0; unsigned char count = 16; - #if defined(SDCC_STACK_AUTO) || defined(SDCC_z80) - char c; - #else - bit c; - #endif + BOOL c; do { - // reste: a <- 0; - c = MSB_SET(a); - a <<= 1; + // reste: x <- 0; + c = MSB_SET(x); + x <<= 1; reste <<= 1; if (c) reste |= 1; - if (reste >= b) + if (reste >= y) { - reste -= b; - // a <- (result = 1) - a |= 1; + reste -= y; + // x <- (result = 1) + x |= 1; } } while (--count); - return a; + return x; } #endif // defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO