X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=device%2Finclude%2Fpic%2Fpic16f628.h;h=3cb50aaea990d2648a74dfcc6783d93a826f2919;hb=ba6ef74b676024c11591d8302681a3809763ed89;hp=5c2803e783d78c4529eee1ed292f34947b018b5d;hpb=52df981797010227196dd29cd77831d01e1825a8;p=fw%2Fsdcc diff --git a/device/include/pic/pic16f628.h b/device/include/pic/pic16f628.h index 5c2803e7..3cb50aae 100644 --- a/device/include/pic/pic16f628.h +++ b/device/include/pic/pic16f628.h @@ -65,41 +65,6 @@ // Memory organization. // -#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000 // INDF -#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000 // TMR0 -#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000 // PCL -#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000 // STATUS -#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000 // FSR -#pragma memmap PORTA_ADDR PORTA_ADDR SFR 0x000 // PORTA -#pragma memmap PORTB_ADDR PORTB_ADDR SFR 0x000 // PORTB -#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000 // PCLATH -#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000 // INTCON -#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000 // PIR1 -#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000 // TMR1L -#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000 // TMR1H -#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000 // T1CON -#pragma memmap TMR2_ADDR TMR2_ADDR SFR 0x000 // TMR2 -#pragma memmap T2CON_ADDR T2CON_ADDR SFR 0x000 // T2CON -#pragma memmap CCPR1L_ADDR CCPR1L_ADDR SFR 0x000 // CCPR1L -#pragma memmap CCPR1H_ADDR CCPR1H_ADDR SFR 0x000 // CCPR1H -#pragma memmap CCP1CON_ADDR CCP1CON_ADDR SFR 0x000 // CCP1CON -#pragma memmap RCSTA_ADDR RCSTA_ADDR SFR 0x000 // RCSTA -#pragma memmap TXREG_ADDR TXREG_ADDR SFR 0x000 // TXREG -#pragma memmap RCREG_ADDR RCREG_ADDR SFR 0x000 // RCREG -#pragma memmap CMCON_ADDR CMCON_ADDR SFR 0x000 // CMCON -#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000 // OPTION_REG -#pragma memmap TRISA_ADDR TRISA_ADDR SFR 0x000 // TRISA -#pragma memmap TRISB_ADDR TRISB_ADDR SFR 0x000 // TRISB -#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000 // PIE1 -#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000 // PCON -#pragma memmap PR2_ADDR PR2_ADDR SFR 0x000 // PR2 -#pragma memmap TXSTA_ADDR TXSTA_ADDR SFR 0x000 // TXSTA -#pragma memmap SPBRG_ADDR SPBRG_ADDR SFR 0x000 // SPBRG -#pragma memmap EEDATA_ADDR EEDATA_ADDR SFR 0x000 // EEDATA -#pragma memmap EEADR_ADDR EEADR_ADDR SFR 0x000 // EEADR -#pragma memmap EECON1_ADDR EECON1_ADDR SFR 0x000 // EECON1 -#pragma memmap EECON2_ADDR EECON2_ADDR SFR 0x000 // EECON2 -#pragma memmap VRCON_ADDR VRCON_ADDR SFR 0x000 // VRCON // LIST @@ -150,42 +115,42 @@ //----- Register Files------------------------------------------------------ -extern data __at (INDF_ADDR) volatile char INDF; -extern sfr __at (TMR0_ADDR) TMR0; -extern data __at (PCL_ADDR) volatile char PCL; -extern sfr __at (STATUS_ADDR) STATUS; -extern sfr __at (FSR_ADDR) FSR; -extern sfr __at (PORTA_ADDR) PORTA; -extern sfr __at (PORTB_ADDR) PORTB; -extern sfr __at (PCLATH_ADDR) PCLATH; -extern sfr __at (INTCON_ADDR) INTCON; -extern sfr __at (PIR1_ADDR) PIR1; -extern sfr __at (TMR1L_ADDR) TMR1L; -extern sfr __at (TMR1H_ADDR) TMR1H; -extern sfr __at (T1CON_ADDR) T1CON; -extern sfr __at (TMR2_ADDR) TMR2; -extern sfr __at (T2CON_ADDR) T2CON; -extern sfr __at (CCPR1L_ADDR) CCPR1L; -extern sfr __at (CCPR1H_ADDR) CCPR1H; -extern sfr __at (CCP1CON_ADDR) CCP1CON; -extern sfr __at (RCSTA_ADDR) RCSTA; -extern sfr __at (TXREG_ADDR) TXREG; -extern sfr __at (RCREG_ADDR) RCREG; -extern sfr __at (CMCON_ADDR) CMCON; - -extern sfr __at (OPTION_REG_ADDR) OPTION_REG; -extern sfr __at (TRISA_ADDR) TRISA; -extern sfr __at (TRISB_ADDR) TRISB; -extern sfr __at (PIE1_ADDR) PIE1; -extern sfr __at (PCON_ADDR) PCON; -extern sfr __at (PR2_ADDR) PR2; -extern sfr __at (TXSTA_ADDR) TXSTA; -extern sfr __at (SPBRG_ADDR) SPBRG; -extern sfr __at (EEDATA_ADDR) EEDATA; -extern sfr __at (EEADR_ADDR) EEADR; -extern sfr __at (EECON1_ADDR) EECON1; -extern sfr __at (EECON2_ADDR) EECON2; -extern sfr __at (VRCON_ADDR) VRCON; +extern __data __at (INDF_ADDR) volatile char INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __data __at (PCL_ADDR) volatile char PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (VRCON_ADDR) VRCON; //----- STATUS Bits --------------------------------------------------------