X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=device%2Finclude%2Fpic%2Fpic16c622.h;h=784ed27e0d68d6e67ec72601d11d654f8ee44ea6;hb=bb226788dab3832b0ec0cda70874ce3fce4eebc6;hp=e03a4b3bb72d644ed02cce5698ff75055e7fae54;hpb=d1509cf37c6ba9cc5aa238fcce11824efefc7941;p=fw%2Fsdcc diff --git a/device/include/pic/pic16c622.h b/device/include/pic/pic16c622.h index e03a4b3b..784ed27e 100644 --- a/device/include/pic/pic16c622.h +++ b/device/include/pic/pic16c622.h @@ -4,7 +4,7 @@ // // This header file was automatically generated by: // -// inc2h.pl V4514 +// inc2h.pl V4783 // // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved // @@ -98,9 +98,9 @@ //----- Register Files------------------------------------------------------ -extern __data __at (INDF_ADDR) volatile char INDF; +extern __sfr __at (INDF_ADDR) INDF; extern __sfr __at (TMR0_ADDR) TMR0; -extern __data __at (PCL_ADDR) volatile char PCL; +extern __sfr __at (PCL_ADDR) PCL; extern __sfr __at (STATUS_ADDR) STATUS; extern __sfr __at (FSR_ADDR) FSR; extern __sfr __at (PORTA_ADDR) PORTA; @@ -188,12 +188,14 @@ typedef union { } __CMCON_bits_t; extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +#ifndef NO_BIT_DEFINES #define CM0 CMCON_bits.CM0 #define CM1 CMCON_bits.CM1 #define CM2 CMCON_bits.CM2 #define CIS CMCON_bits.CIS #define C1OUT CMCON_bits.C1OUT #define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ // ----- INTCON bits -------------------- typedef union { @@ -210,6 +212,7 @@ typedef union { } __INTCON_bits_t; extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +#ifndef NO_BIT_DEFINES #define RBIF INTCON_bits.RBIF #define INTF INTCON_bits.INTF #define T0IF INTCON_bits.T0IF @@ -218,6 +221,7 @@ extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; #define T0IE INTCON_bits.T0IE #define PEIE INTCON_bits.PEIE #define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ // ----- OPTION_REG bits -------------------- typedef union { @@ -234,6 +238,7 @@ typedef union { } __OPTION_REG_bits_t; extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +#ifndef NO_BIT_DEFINES #define PS0 OPTION_REG_bits.PS0 #define PS1 OPTION_REG_bits.PS1 #define PS2 OPTION_REG_bits.PS2 @@ -242,6 +247,7 @@ extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; #define T0CS OPTION_REG_bits.T0CS #define INTEDG OPTION_REG_bits.INTEDG #define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ // ----- PCON bits -------------------- typedef union { @@ -268,9 +274,11 @@ typedef union { } __PCON_bits_t; extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +#ifndef NO_BIT_DEFINES #define NOT_BO PCON_bits.NOT_BO #define NOT_BOR PCON_bits.NOT_BOR #define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ // ----- PIE1 bits -------------------- typedef union { @@ -287,7 +295,9 @@ typedef union { } __PIE1_bits_t; extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +#ifndef NO_BIT_DEFINES #define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ // ----- PIR1 bits -------------------- typedef union { @@ -304,7 +314,9 @@ typedef union { } __PIR1_bits_t; extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +#ifndef NO_BIT_DEFINES #define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ // ----- PORTA bits -------------------- typedef union { @@ -321,12 +333,14 @@ typedef union { } __PORTA_bits_t; extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +#ifndef NO_BIT_DEFINES #define RA0 PORTA_bits.RA0 #define RA1 PORTA_bits.RA1 #define RA2 PORTA_bits.RA2 #define RA3 PORTA_bits.RA3 #define RA4 PORTA_bits.RA4 #define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ // ----- PORTB bits -------------------- typedef union { @@ -343,6 +357,7 @@ typedef union { } __PORTB_bits_t; extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +#ifndef NO_BIT_DEFINES #define RB0 PORTB_bits.RB0 #define RB1 PORTB_bits.RB1 #define RB2 PORTB_bits.RB2 @@ -351,6 +366,7 @@ extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; #define RB5 PORTB_bits.RB5 #define RB6 PORTB_bits.RB6 #define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ // ----- STATUS bits -------------------- typedef union { @@ -367,6 +383,7 @@ typedef union { } __STATUS_bits_t; extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +#ifndef NO_BIT_DEFINES #define C STATUS_bits.C #define DC STATUS_bits.DC #define Z STATUS_bits.Z @@ -375,6 +392,7 @@ extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; #define RP0 STATUS_bits.RP0 #define RP1 STATUS_bits.RP1 #define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ // ----- TRISA bits -------------------- typedef union { @@ -391,12 +409,14 @@ typedef union { } __TRISA_bits_t; extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +#ifndef NO_BIT_DEFINES #define TRISA0 TRISA_bits.TRISA0 #define TRISA1 TRISA_bits.TRISA1 #define TRISA2 TRISA_bits.TRISA2 #define TRISA3 TRISA_bits.TRISA3 #define TRISA4 TRISA_bits.TRISA4 #define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ // ----- TRISB bits -------------------- typedef union { @@ -413,6 +433,7 @@ typedef union { } __TRISB_bits_t; extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +#ifndef NO_BIT_DEFINES #define TRISB0 TRISB_bits.TRISB0 #define TRISB1 TRISB_bits.TRISB1 #define TRISB2 TRISB_bits.TRISB2 @@ -421,6 +442,7 @@ extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; #define TRISB5 TRISB_bits.TRISB5 #define TRISB6 TRISB_bits.TRISB6 #define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ // ----- VRCON bits -------------------- typedef union { @@ -437,6 +459,7 @@ typedef union { } __VRCON_bits_t; extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +#ifndef NO_BIT_DEFINES #define VR0 VRCON_bits.VR0 #define VR1 VRCON_bits.VR1 #define VR2 VRCON_bits.VR2 @@ -444,5 +467,6 @@ extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; #define VRR VRCON_bits.VRR #define VROE VRCON_bits.VROE #define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ #endif