X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=ChangeLog;h=fe4b2e0ad0a30f77ef0d32d0f4d6f56d0a16fcd9;hb=3f1a04bb9806ee81cb2561be4ff4cd21f0214730;hp=ff929c693642d939af1be745a686490e2d3676ad;hpb=7cafa742776543fdfa27fda1258ce8a8d64c7c9c;p=fw%2Fsdcc diff --git a/ChangeLog b/ChangeLog index ff929c69..fe4b2e0a 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,24 @@ +2004-03-02 Vangelis Rokas + + * src/pic16/device.c (checkAddSym): NEW, adds a symbol to set while + checking if symbol is already in set, + * src/pic16/device.h: prototype for checkAddSym, + * src/pic16/gen.c: (_G): added entry interruptvector, + * (assignResultValue): removed some commented out lines, + * (genFunction): check for ISR via sym->type, absolute section for + interrupt code is created via a new pBlock, the goto instruction is + placed now correctly at the interrupt vector position, changed all + references from ivec to _G.interruptvector, + * WREG,STATUS,BSR are not saved in stack upon an entry to interrupt + is the interrupt is a high priority one, same for return from ISR, + * src/pic16/glue.c: changed all calls of addSetHead for publics and + externs to calls of checkAddSym, + * src/pic16/pcode.c (pic16_pBlockConvert2*): emit warning when + pic16_pcode_verbose flag is set, + * src/pic16/pcode.h: extern to pic16_pcode_verbose, + * src/pic16/pcoderegs.c: message about how many registers are saved + will only be emitted if pic16_pcode_verbose flag is set, + 2004-03-02 Erik Petrich * src/ds390/ralloc.h, @@ -26,7 +47,7 @@ * (print_idataType, print_idata): NEW to create idata sections * src/pic16/device.h: idataSymSet new variable * src/pic16/gen.c (genFunction): fixed some bugs in string - comparing, improved the aboslute section creation for ISRs, + comparing, improved the absolute section creation for ISRs, added FSR0L/FSR0H in registers that are saved in an ISR, * (genInline): fixed the processing of inline snippets, now they undergo no process by the peephole optimizer