X-Git-Url: https://git.gag.com/?a=blobdiff_plain;ds=sidebyside;f=device%2Finclude%2Fpic%2Fpic16f87.h;fp=device%2Finclude%2Fpic%2Fpic16f87.h;h=7fa5def4871a42235819f8f60ed7feed936b9c4f;hb=f970f0e6603401042048d98927927133a0f9f255;hp=567a7f450cd4cb0768fe936d7aa1f41f2076fb0b;hpb=53e51dc89225067784c743d80ee7c19b8a5fa956;p=fw%2Fsdcc

diff --git a/device/include/pic/pic16f87.h b/device/include/pic/pic16f87.h
index 567a7f45..7fa5def4 100644
--- a/device/include/pic/pic16f87.h
+++ b/device/include/pic/pic16f87.h
@@ -76,52 +76,6 @@
 // Memory organization.
 //
 
-#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000	// INDF
-#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000	// TMR0
-#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000	// PCL
-#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000	// STATUS
-#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000	// FSR
-#pragma memmap PORTA_ADDR PORTA_ADDR SFR 0x000	// PORTA
-#pragma memmap PORTB_ADDR PORTB_ADDR SFR 0x000	// PORTB
-#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000	// PCLATH
-#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000	// INTCON
-#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000	// PIR1
-#pragma memmap PIR2_ADDR PIR2_ADDR SFR 0x000	// PIR2
-#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000	// TMR1L
-#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000	// TMR1H
-#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000	// T1CON
-#pragma memmap TMR2_ADDR TMR2_ADDR SFR 0x000	// TMR2
-#pragma memmap T2CON_ADDR T2CON_ADDR SFR 0x000	// T2CON
-#pragma memmap SSPBUF_ADDR SSPBUF_ADDR SFR 0x000	// SSPBUF
-#pragma memmap SSPCON_ADDR SSPCON_ADDR SFR 0x000	// SSPCON
-#pragma memmap CCPR1L_ADDR CCPR1L_ADDR SFR 0x000	// CCPR1L
-#pragma memmap CCPR1H_ADDR CCPR1H_ADDR SFR 0x000	// CCPR1H
-#pragma memmap CCP1CON_ADDR CCP1CON_ADDR SFR 0x000	// CCP1CON
-#pragma memmap RCSTA_ADDR RCSTA_ADDR SFR 0x000	// RCSTA
-#pragma memmap TXREG_ADDR TXREG_ADDR SFR 0x000	// TXREG
-#pragma memmap RCREG_ADDR RCREG_ADDR SFR 0x000	// RCREG
-#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000	// OPTION_REG
-#pragma memmap TRISA_ADDR TRISA_ADDR SFR 0x000	// TRISA
-#pragma memmap TRISB_ADDR TRISB_ADDR SFR 0x000	// TRISB
-#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000	// PIE1
-#pragma memmap PIE2_ADDR PIE2_ADDR SFR 0x000	// PIE2
-#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000	// PCON
-#pragma memmap OSCCON_ADDR OSCCON_ADDR SFR 0x000	// OSCCON
-#pragma memmap OSCTUNE_ADDR OSCTUNE_ADDR SFR 0x000	// OSCTUNE
-#pragma memmap PR2_ADDR PR2_ADDR SFR 0x000	// PR2
-#pragma memmap SSPADD_ADDR SSPADD_ADDR SFR 0x000	// SSPADD
-#pragma memmap SSPSTAT_ADDR SSPSTAT_ADDR SFR 0x000	// SSPSTAT
-#pragma memmap TXSTA_ADDR TXSTA_ADDR SFR 0x000	// TXSTA
-#pragma memmap SPBRG_ADDR SPBRG_ADDR SFR 0x000	// SPBRG
-#pragma memmap CMCON_ADDR CMCON_ADDR SFR 0x000	// CMCON
-#pragma memmap CVRCON_ADDR CVRCON_ADDR SFR 0x000	// CVRCON
-#pragma memmap WDTCON_ADDR WDTCON_ADDR SFR 0x000	// WDTCON
-#pragma memmap EEDATA_ADDR EEDATA_ADDR SFR 0x000	// EEDATA
-#pragma memmap EEADR_ADDR EEADR_ADDR SFR 0x000	// EEADR
-#pragma memmap EEDATH_ADDR EEDATH_ADDR SFR 0x000	// EEDATH
-#pragma memmap EEADRH_ADDR EEADRH_ADDR SFR 0x000	// EEADRH
-#pragma memmap EECON1_ADDR EECON1_ADDR SFR 0x000	// EECON1
-#pragma memmap EECON2_ADDR EECON2_ADDR SFR 0x000	// EECON2
 
 
 //         LIST