/* -*- c++ -*- */
/*
- * Copyright 2008 Free Software Foundation, Inc.
+ * Copyright 2008,2009 Free Software Foundation, Inc.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <boost/shared_ptr.hpp>
#include <boost/utility.hpp>
+#include <boost/bind.hpp>
#include <vector>
#include <complex>
#include <usrp2/rx_sample_handler.h>
#include <usrp2/tune_result.h>
-
+#include <usrp2/mimo_config.h>
/*
* N.B., The interfaces described here are still in flux.
*
* \returns a vector of properties, 1 entry for each matching USRP2 found.
*/
- props_vector_t find(const std::string &ifc, const std::string &mac_addr="");
+ props_vector_t find(const std::string &ifc, const std::string &mac_addr="");
class tune_result;
-
+
+ // FIXME: get from firmware include
+ static const int GPIO_TX_BANK = 0;
+ static const int GPIO_RX_BANK = 1;
+
+ /*!
+ * \brief standard C++ interface to USRP2
+ * \ingroup usrp2
+ */
class usrp2 : boost::noncopyable
{
public:
/*!
* Shared pointer to this class
- */
+ */
typedef boost::shared_ptr<usrp2> sptr;
-
- /*!
+
+ /*!
* Static function to return an instance of usrp2 as a shared pointer
*
* \param ifc Network interface name, e.g., "eth0"
* \param addr Network mac address, e.g., "01:23:45:67:89:ab", "89:ab" or "".
* If \p addr is HH:HH, it's treated as if it were 00:50:c2:85:HH:HH
* "" will autoselect a USRP2 if there is only a single one on the local ethernet.
+ * \param rx_bufsize is the length in bytes of the kernel networking buffer to allocate.
*/
- static sptr make(const std::string &ifc, const std::string &addr="");
+ static sptr make(const std::string &ifc, const std::string &addr="", size_t rx_bufsize=0);
/*!
* Class destructor
*/
- ~usrp2();
+ ~usrp2();
/*!
* Returns the MAC address associated with this USRP
*/
std::string mac_addr();
+ /*!
+ * Returns the GbE interface name associated with this USRP
+ */
+ std::string interface_name();
+
/*
* ----------------------------------------------------------------
* Rx configuration and control
* ----------------------------------------------------------------
*/
+ /*!
+ * Set the rx antenna
+ */
+ bool set_rx_antenna(int ant);
+
/*!
* Set receiver gain
* \param gain in dB (more or less)
*/
bool set_rx_gain(double gain);
- //! return minimum Rx gain
+ //! return minimum Rx gain
double rx_gain_min();
- //! return maximum Rx gain
+ //! return maximum Rx gain
double rx_gain_max();
//! return Rx gain db_per_step
double rx_gain_db_per_step();
+ /*!
+ * \brief Set receive daughterboard LO offset frequency
+ */
+ bool set_rx_lo_offset(double frequency);
+
/*!
* Set receiver center frequency
*/
/*!
* Set received sample format
- *
+ *
* domain: complex or real
* type: floating, fixed point, or raw
* depth: bits per sample
/*!
* Start streaming receive mode. USRP2 will send a continuous stream of
* DSP pipeline samples to host. Call rx_samples(...) to access.
- *
+ *
* \param channel Stream channel number (0-30)
* \param items_per_frame Number of 32-bit items per frame.
*/
bool start_rx_streaming(unsigned int channel=0, unsigned int items_per_frame=0);
-
+
+ /*!
+ * Start streaming receive mode at specified timestamp. USRP2 will send a
+ * continuous stream of DSP pipeline samples to host. Call rx_samples(...)
+ * to access.
+ *
+ * \param channel Stream channel number (0-30)
+ * \param items_per_frame Number of 32-bit items per frame.
+ * \param time Timestamp to start streaming at
+ */
+ bool start_rx_streaming_at(unsigned int channel=0, unsigned int items_per_frame=0, unsigned int time=0);
+
+ /*!
+ * Sync to PPS and start streaming receive mode at specified timestamp.
+ * Just like calling sync_to_pps() and start_rx_streaming_at().
+ *
+ * \param channel Stream channel number (0-30)
+ * \param items_per_frame Number of 32-bit items per frame.
+ * \param time Timestamp to start streaming at
+ */
+ bool sync_and_start_rx_streaming_at(unsigned int channel=0, unsigned int items_per_frame=0, uint32_t time=0);
+
/*!
* Stop streaming receive mode.
*/
* Returns number of times receive overruns have occurred
*/
unsigned int rx_overruns();
-
+
/*!
* Returns total number of missing frames from overruns.
*/
* ----------------------------------------------------------------
*/
+ /*!
+ * Set the tx antenna
+ */
+ bool set_tx_antenna(int ant);
+
/*!
* Set transmitter gain
*/
bool set_tx_gain(double gain);
- //! return minimum Tx gain
+ //! return minimum Tx gain
double tx_gain_min();
- //! return maximum Tx gain
+ //! return maximum Tx gain
double tx_gain_max();
//! return Tx gain db_per_step
double tx_gain_db_per_step();
+ /*
+ * \brief Set transmit daughterboard LO offset frequency
+ */
+ bool set_tx_lo_offset(double frequency);
+
/*!
* Set transmitter center frequency
*/
//! Return current interpolation factor
int tx_interp();
+ /*
+ * \brief Calculate default scale_iq for given interpolation rate
+ */
+ void default_tx_scale_iq(int interpolation_factor, int *scale_i, int *scale_q);
+
/*!
* Set transmit IQ magnitude scaling
*/
/*!
* Set transmit sample format
- *
+ *
* domain: complex or real
* type: floating, fixed point, or raw
* depth: bits per sample
* \param nsamples is the number of samples to transmit
* \param metadata provides the timestamp and flags
*
- * The complex<float> samples are converted to the appropriate
+ * The complex<float> samples are converted to the appropriate
* "on the wire" representation, depending on the current USRP2
* configuration. Typically, this is big-endian 16-bit I & Q.
*/
bool burn_mac_addr(const std::string &new_addr);
/*!
- * Reset master time to 0 at next PPS rising edge
+ * Reset master time to 0 at next PPS edge
*/
bool sync_to_pps();
+ /*!
+ * Reset master time to 0 at every PPS edge
+ */
+ bool sync_every_pps(bool enable);
+
/*!
* Read memory from Wishbone bus as 32-bit words. Handles endian swapping if needed.
*
* \param addr 32-bit aligned address. Only the lower 16-bits are significant.
* \param words Number of 32-bit words
- *
+ *
* \returns Vector of 32-bit read values
*
* WARNING: Attempts to read memory from addresses that do not correspond to RAM or
* memory-mapped peripherals may cause the USRP2 to hang, requiring a power cycle.
- *
+ *
*/
std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
+ /*!
+ * Write memory to Wishbone bus as 32-bit words. Handles endian swapping if needed.
+ *
+ * \param addr 32-bit aligned address. Only the lower 16-bits are significant
+ * \param data Vector of 32-bit values to write.
+ *
+ * \returns true iff successful
+ *
+ * WARNING: Attempts to read memory from addresses that do not correspond to RAM or
+ * memory-mapped peripherals may cause the USRP2 to hang, requiring a power cycle.
+ *
+ */
+ bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
+
+ /*!
+ * Set daughterboard GPIO data direction register.
+ *
+ * \param bank GPIO_TX_BANK or GPIO_RX_BANK
+ * \param value 16-bits, 0=FPGA input, 1=FPGA output
+ * \param mask 16-bits, 0=ignore, 1=set
+ *
+ * \returns true iff successful
+ *
+ * WARNING: Improper usage of this function may result in damage to the USRP2
+ *
+ */
+ bool set_gpio_ddr(int bank, uint16_t value, uint16_t mask);
+
+ /*!
+ * Set daughterboard GPIO output selection register. For those GPIO pins that
+ * are configured as outputs in the DDR, this settings configures the source
+ * of the pin value.
+ *
+ * \param bank GPIO_TX_BANK or GPIO_RX_BANK
+ * \param sels Exactly 16 character MSB->LSB string. For each position:
+ * '.' = ignore this bit, i.e., leave current value
+ * 'a' = Output ATR value
+ * 's' = Output host software controlled value
+ * '0' = Output FPGA debug bus 0 value
+ * '1' = Output FPGA debug bus 1 value
+ *
+ * \returns true iff successful
+ *
+ * WARNING: Improper usage of this function may result in damage to the USRP2
+ *
+ */
+ bool set_gpio_sels(int bank, std::string sels);
+
+ /*!
+ * Set daughterboard GPIO pin values.
+ *
+ * \param bank GPIO_TX_BANK or GPIO_RX_BANK
+ * \param value 16 bits, 0=low, 1=high
+ * \param mask 16 bits, 0=ignore, 1=set
+ *
+ * \returns true iff successful
+ *
+ * WARNING: Improper usage of this function may result in damage to the USRP2
+ *
+ */
+ bool write_gpio(int bank, uint16_t value, uint16_t mask);
+
+ /*!
+ * Read daughterboard GPIO pin values
+ *
+ * \param bank GPIO_TX_BANK or GPIO_RX_BANK
+ * \param value pointer to uint16_t to hold read results
+ *
+ * \returns true iff successful
+ *
+ */
+ bool read_gpio(int bank, uint16_t *value);
+
+ /*!
+ * Set GPIO streaming mode
+ *
+ * Individually enables streaming GPIO pins through LSBs of DSP
+ * samples.
+ *
+ * On receive, io_rx[15] replaces I[0], io_rx[14] replaces Q[0]
+ * On transmit, I[0] maps to io_tx[15], Q[0] maps to io_tx[14]
+ * (Transmit streaming is not yet implemented.)
+ *
+ * The selected GPIO pins must have been set as inputs or outputs
+ * and, for transmit, set to software control.
+ *
+ * When enabled, the replaced DSP sample LSBs become 0.
+ *
+ * \param bank GPIO_TX_BANK or GPIO_RX_BANK
+ * \param enable enable[0] controls I channel LSB
+ * enable[1] controls Q channel LSB
+ *
+ * \returns true iff successful
+ *
+ * WARNING: Improper usage of this function may result in damage to the USRP2
+ *
+ */
+ bool enable_gpio_streaming(int bank, int enable);
#if 0 // not yet implemented
/*!
private:
// Static function to retrieve or create usrp2 instance
- static sptr find_existing_or_make_new(const std::string &ifc, props *p);
+ static sptr find_existing_or_make_new(const std::string &ifc, props *p, size_t rx_bufsize);
// Only class members can instantiate this class
- usrp2(const std::string &ifc, props *p);
-
+ usrp2(const std::string &ifc, props *p, size_t rx_bufsize);
+
// All private state is held in opaque pointer
std::auto_ptr<impl> d_impl;
};
projects / debian / gnuradio / blobdiff