/* -*- c++ -*- */
/*
* Copyright 2003,2004,2006,2009 Free Software Foundation, Inc.
- *
+ *
* This file is part of GNU Radio
- *
+ *
* GNU Radio is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3, or (at your option)
* any later version.
- *
+ *
* GNU Radio is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
+ *
* You should have received a copy of the GNU General Public License
* along with GNU Radio; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
if (!reset_cpu (udh, true)) // hold CPU in reset while loading firmware
goto fail;
-
+
char s[1024];
int length;
int addr;
if (write_cmd (udh, VRQ_FPGA_LOAD, 0, FL_BEGIN, 0, 0) != 0)
goto fail;
-
+
while ((n = fread (buf, 1, sizeof (buf), fp)) > 0){
if (write_cmd (udh, VRQ_FPGA_LOAD, 0, FL_XFER, buf, n) != n)
goto fail;
if (write_cmd (udh, VRQ_FPGA_LOAD, 0, FL_END, 0, 0) != 0)
goto fail;
-
+
fclose (fp);
if (!usrp_set_hash (udh, FPGA_HASH_SLOT, hash))
usrp_set_fpga_reset (udh, 0); // fpga out of master reset
// now these commands will work
-
+
ok &= usrp_set_fpga_tx_enable (udh, 0);
ok &= usrp_set_fpga_rx_enable (udh, 0);
// ----------------------------------------------------------------
-bool
+bool
usrp_set_led (libusb_device_handle *udh, int which, bool on)
{
int r = write_cmd (udh, VRQ_SET_LED, on, which, 0, 0);
(unsigned char *) hash, USRP_HASH_SIZE, 1000);
return r == USRP_HASH_SIZE;
}
-
+
bool
usrp_get_hash (libusb_device_handle *udh, int which,
unsigned char hash[USRP_HASH_SIZE])
buf[1] = (value >> 16) & 0xff;
buf[2] = (value >> 8) & 0xff;
buf[3] = (value >> 0) & 0xff;
-
+
return usrp_spi_write (udh, 0x00 | (regno & 0x7f),
SPI_ENABLE_FPGA,
SPI_FMT_MSB | SPI_FMT_HDR_1,
}
}
-bool
+bool
usrp_set_fpga_reset (libusb_device_handle *udh, bool on)
{
return usrp_set_switch (udh, VRQ_FPGA_SET_RESET, on);
}
-bool
+bool
usrp_set_fpga_tx_enable (libusb_device_handle *udh, bool on)
{
return usrp_set_switch (udh, VRQ_FPGA_SET_TX_ENABLE, on);
}
-bool
+bool
usrp_set_fpga_rx_enable (libusb_device_handle *udh, bool on)
{
return usrp_set_switch (udh, VRQ_FPGA_SET_RX_ENABLE, on);
}
-bool
+bool
usrp_set_fpga_tx_reset (libusb_device_handle *udh, bool on)
{
return usrp_set_switch (udh, VRQ_FPGA_SET_TX_RESET, on);
}
-bool
+bool
usrp_set_fpga_rx_reset (libusb_device_handle *udh, bool on)
{
return usrp_set_switch (udh, VRQ_FPGA_SET_RX_RESET, on);
}
int r = md5_stream (fp, hash);
fclose (fp);
-
+
return r == 0;
}
{
unsigned char file_hash[USRP_HASH_SIZE];
unsigned char usrp_hash[USRP_HASH_SIZE];
-
+
if (access (filename, R_OK) != 0){
perror (filename);
return ULS_ERROR;
case ULS_OK:
// we loaded firmware successfully.
-
+
// It's highly likely that the board will renumerate (simulate a
// disconnect/reconnect sequence), invalidating our current
// handle.
// FIXME. Turn this into a loop that rescans until we refind ourselves
-
+
struct timespec t; // delay for 1 second
t.tv_sec = 2;
t.tv_nsec = 0;
{
char *e = getenv("USRP_VERBOSE");
bool verbose = e != 0;
-
+
switch (s){
case ULS_ERROR:
fprintf (stderr, "usrp: failed to load %s %s.\n", type, filename);
break;
-
+
case ULS_ALREADY_LOADED:
if (verbose)
fprintf (stderr, "usrp: %s %s already loaded.\n", type, filename);
libusb_device_handle *udh = open_nth_cmd_interface (nth, ctx);
if (udh == 0)
return false;
-
+
s = usrp_load_fpga (udh, filename, force);
usrp_close_interface (udh);
load_status_msg (s, "fpga bitstream", filename);
{
unsigned char status;
*trouble = true;
-
+
if (write_cmd (udh, VRQ_GET_STATUS, 0, which,
&status, sizeof (status)) != sizeof (status))
return false;
unsigned char buf[1];
buf[0] = value;
-
+
return usrp_spi_write (udh, 0x00 | (regno & 0x3f),
which_codec == 0 ? SPI_ENABLE_CODEC_A : SPI_ENABLE_CODEC_B,
SPI_FMT_MSB | SPI_FMT_HDR_1,
{
unsigned char cmd[2];
const unsigned char *p = (unsigned char *) buf;
-
+
// The simplest thing that could possibly work:
// all writes are single byte writes.
//
if (!r)
return false;
}
-
+
return true;
}
}
return true;
}
-
+
// ----------------------------------------------------------------
static bool
slot_to_codec (int slot, int *which_codec)
{
*which_codec = 0;
-
+
switch (slot){
case SLOT_TX_A:
case SLOT_RX_A:
int which_dac, int value)
{
int which_codec;
-
+
if (!slot_to_codec (slot, &which_codec))
return false;
}
value &= 0x0fff; // mask to 12-bits
-
+
if (which_dac == 3){
// dac 3 is really 12-bits. Use value as is.
bool r = true;
return r;
}
else {
- // dac 0, 1, and 2 are really 8 bits.
+ // dac 0, 1, and 2 are really 8 bits.
value = value >> 4; // shift value appropriately
return usrp_9862_write (udh, which_codec, 36 + which_dac, value);
}
| AUX_ADC_CTRL_REFSEL_B; // on chip reference
int rd_reg = 26; // base address of two regs to read for result
-
+
// program the ADC mux bits
if (tx_slot_p (slot))
aux_adc_control |= AUX_ADC_CTRL_SELECT_A2 | AUX_ADC_CTRL_SELECT_B2;
rd_reg += 2;
aux_adc_control |= AUX_ADC_CTRL_SELECT_A1 | AUX_ADC_CTRL_SELECT_B1;
}
-
+
// I'm not sure if we can set the mux and issue a start conversion
// in the same cycle, so let's do them one at a time.
if (r)
*value = ((v_hi << 2) | ((v_lo >> 6) & 0x3)) << 2; // format as 12-bit
-
+
return r;
}