Remove usrp1 and usrp2 FPGA files. These are now hosted at:

[debian/gnuradio] / usrp / fpga / megacells / fifo_4kx16_dc.inc

diff --git a/usrp/fpga/megacells/fifo_4kx16_dc.inc b/usrp/fpga/megacells/fifo_4kx16_dc.inc
deleted file mode 100755 (executable)
index c14c018..0000000
--- a/usrp/fpga/megacells/fifo_4kx16_dc.inc
+++ /dev/null
@@ -1,32 +0,0 @@
---Copyright (C) 1991-2006 Altera Corporation\r
---Your use of Altera Corporation's design tools, logic functions \r
---and other software and tools, and its AMPP partner logic \r
---functions, and any output files any of the foregoing \r
---(including device programming or simulation files), and any \r
---associated documentation or information are expressly subject \r
---to the terms and conditions of the Altera Program License \r
---Subscription Agreement, Altera MegaCore Function License \r
---Agreement, or other applicable license agreement, including, \r
---without limitation, that your use is for the sole purpose of \r
---programming logic devices manufactured by Altera and sold by \r
---Altera or its authorized distributors.  Please refer to the \r
---applicable agreement for further details.\r
-\r
-\r
-FUNCTION fifo_4kx16_dc \r
-(\r
-       aclr,\r
-       data[15..0],\r
-       rdclk,\r
-       rdreq,\r
-       wrclk,\r
-       wrreq\r
-)\r
-\r
-RETURNS (\r
-       q[15..0],\r
-       rdempty,\r
-       rdusedw[11..0],\r
-       wrfull,\r
-       wrusedw[11..0]\r
-);\r