- added testing binaries
[fw/openocd] / testing / examples / SAM7S256Test / test_ram.map
diff --git a/testing/examples/SAM7S256Test/test_ram.map b/testing/examples/SAM7S256Test/test_ram.map
new file mode 100644 (file)
index 0000000..6c07d62
--- /dev/null
@@ -0,0 +1,170 @@
+\r
+Memory Configuration\r
+\r
+Name             Origin             Length             Attributes\r
+ram              0x00200000         0x00010000\r
+*default*        0x00000000         0xffffffff\r
+\r
+Linker script and memory map\r
+\r
+LOAD ./src/crt.o\r
+LOAD ./src/main.o\r
+START GROUP\r
+LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2\libgcc.a\r
+LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2/../../../../arm-elf/lib\libc.a\r
+END GROUP\r
+                0x00000100                FIQ_STACK_SIZE = 0x100\r
+                0x00000100                IRQ_STACK_SIZE = 0x100\r
+                0x00000100                ABT_STACK_SIZE = 0x100\r
+                0x00000100                UND_STACK_SIZE = 0x100\r
+                0x00000400                SVC_STACK_SIZE = 0x400\r
+\r
+.text           0x00200000      0x194\r
+ *(.vectors)\r
+ .vectors       0x00200000       0x40 ./src/crt.o\r
+                0x00200040                . = ALIGN (0x4)\r
+ *(.init)\r
+ .init          0x00200040       0xf0 ./src/crt.o\r
+                0x002000f8                FIQHandler\r
+                0x002000ec                PAbortHandler\r
+                0x002000d4                ExitFunction\r
+                0x00200040                ResetHandler\r
+                0x002000f0                DAbortHandler\r
+                0x002000f4                IRQHandler\r
+                0x002000e4                UndefHandler\r
+                0x00200130                . = ALIGN (0x4)\r
+ *(.text)\r
+ .text          0x00200130        0x0 ./src/crt.o\r
+ .text          0x00200130       0x60 ./src/main.o\r
+                0x00200130                main\r
+                0x00200190                . = ALIGN (0x4)\r
+ *(.rodata)\r
+ .rodata        0x00200190        0x4 ./src/main.o\r
+                0x00200194                . = ALIGN (0x4)\r
+ *(.rodata*)\r
+                0x00200194                . = ALIGN (0x4)\r
+ *(.glue_7t)\r
+ .glue_7t       0x00200194        0x0 ./src/crt.o\r
+ .glue_7t       0x00200194        0x0 ./src/main.o\r
+                0x00200194                . = ALIGN (0x4)\r
+ *(.glue_7)\r
+ .glue_7        0x00200194        0x0 ./src/crt.o\r
+ .glue_7        0x00200194        0x0 ./src/main.o\r
+                0x00200194                . = ALIGN (0x4)\r
+                0x00200194                etext = .\r
+\r
+.vfp11_veneer   0x00000000        0x0\r
+ .vfp11_veneer  0x00000000        0x0 ./src/crt.o\r
+ .vfp11_veneer  0x00000000        0x0 ./src/main.o\r
+\r
+.data           0x00200194        0x0\r
+                0x00200194                PROVIDE (__data_start, .)\r
+ *(.data)\r
+ .data          0x00200194        0x0 ./src/crt.o\r
+ .data          0x00200194        0x0 ./src/main.o\r
+                0x00200194                . = ALIGN (0x4)\r
+                0x00200194                edata = .\r
+                0x00200194                _edata = .\r
+                0x00200194                PROVIDE (__data_end, .)\r
+\r
+.bss            0x00200194      0x86c\r
+                0x00200194                PROVIDE (__bss_start, .)\r
+ *(.bss)\r
+ .bss           0x00200194        0x0 ./src/crt.o\r
+ .bss           0x00200194        0x0 ./src/main.o\r
+ *(COMMON)\r
+                0x00200194                . = ALIGN (0x4)\r
+                0x00200194                PROVIDE (__bss_end, .)\r
+                0x00200200                . = ALIGN (0x100)\r
+ *fill*         0x00200194       0x6c 00\r
+                0x00200200                PROVIDE (__stack_start, .)\r
+                0x00200200                PROVIDE (__stack_fiq_start, .)\r
+                0x00200300                . = (. + FIQ_STACK_SIZE)\r
+ *fill*         0x00200200      0x100 00\r
+                0x00200300                . = ALIGN (0x4)\r
+                0x00200300                PROVIDE (__stack_fiq_end, .)\r
+                0x00200300                PROVIDE (__stack_irq_start, .)\r
+                0x00200400                . = (. + IRQ_STACK_SIZE)\r
+ *fill*         0x00200300      0x100 00\r
+                0x00200400                . = ALIGN (0x4)\r
+                0x00200400                PROVIDE (__stack_irq_end, .)\r
+                0x00200400                PROVIDE (__stack_abt_start, .)\r
+                0x00200500                . = (. + ABT_STACK_SIZE)\r
+ *fill*         0x00200400      0x100 00\r
+                0x00200500                . = ALIGN (0x4)\r
+                0x00200500                PROVIDE (__stack_abt_end, .)\r
+                0x00200500                PROVIDE (__stack_und_start, .)\r
+                0x00200600                . = (. + UND_STACK_SIZE)\r
+ *fill*         0x00200500      0x100 00\r
+                0x00200600                . = ALIGN (0x4)\r
+                0x00200600                PROVIDE (__stack_und_end, .)\r
+                0x00200600                PROVIDE (__stack_svc_start, .)\r
+                0x00200a00                . = (. + SVC_STACK_SIZE)\r
+ *fill*         0x00200600      0x400 00\r
+                0x00200a00                . = ALIGN (0x4)\r
+                0x00200a00                PROVIDE (__stack_svc_end, .)\r
+                0x00200a00                PROVIDE (__stack_end, .)\r
+                0x00200a00                PROVIDE (__heap_start, .)\r
+OUTPUT(test_ram.elf elf32-littlearm)\r
+\r
+.ARM.attributes\r
+                0x00000000       0x10\r
+ .ARM.attributes\r
+                0x00000000       0x10 ./src/crt.o\r
+ .ARM.attributes\r
+                0x00000010       0x10 ./src/main.o\r
+\r
+.debug_line     0x00000000       0xd6\r
+ .debug_line    0x00000000       0x7f ./src/crt.o\r
+ .debug_line    0x0000007f       0x57 ./src/main.o\r
+\r
+.debug_info     0x00000000      0x1aa\r
+ .debug_info    0x00000000       0x75 ./src/crt.o\r
+ .debug_info    0x00000075      0x135 ./src/main.o\r
+\r
+.debug_abbrev   0x00000000       0x6d\r
+ .debug_abbrev  0x00000000       0x12 ./src/crt.o\r
+ .debug_abbrev  0x00000012       0x5b ./src/main.o\r
+\r
+.debug_aranges  0x00000000       0x48\r
+ .debug_aranges\r
+                0x00000000       0x28 ./src/crt.o\r
+ .debug_aranges\r
+                0x00000028       0x20 ./src/main.o\r
+\r
+.debug_ranges   0x00000000       0x20\r
+ .debug_ranges  0x00000000       0x20 ./src/crt.o\r
+\r
+.debug_frame    0x00000000       0x24\r
+ .debug_frame   0x00000000       0x24 ./src/main.o\r
+\r
+.debug_loc      0x00000000       0x1f\r
+ .debug_loc     0x00000000       0x1f ./src/main.o\r
+\r
+.debug_pubnames\r
+                0x00000000       0x1b\r
+ .debug_pubnames\r
+                0x00000000       0x1b ./src/main.o\r
+\r
+.comment        0x00000000       0x12\r
+ .comment       0x00000000       0x12 ./src/main.o\r
+\r
+Cross Reference Table\r
+\r
+Symbol                                            File\r
+DAbortHandler                                     ./src/crt.o\r
+ExitFunction                                      ./src/crt.o\r
+FIQHandler                                        ./src/crt.o\r
+IRQHandler                                        ./src/crt.o\r
+PAbortHandler                                     ./src/crt.o\r
+ResetHandler                                      ./src/crt.o\r
+UndefHandler                                      ./src/crt.o\r
+__bss_end                                         ./src/crt.o\r
+__bss_start                                       ./src/crt.o\r
+__stack_abt_end                                   ./src/crt.o\r
+__stack_fiq_end                                   ./src/crt.o\r
+__stack_irq_end                                   ./src/crt.o\r
+__stack_svc_end                                   ./src/crt.o\r
+__stack_und_end                                   ./src/crt.o\r
+main                                              ./src/main.o\r
+                                                  ./src/crt.o\r