add another resistor so we can detect a FET that fails shorted

[hw/quantimotor] / telestatic.sch

diff --git a/telestatic.sch b/telestatic.sch
index 35547df2fd6f9405f4e2fab455794f5639a2add4..62efb1f5293d9188ff337bc2dad779a7c690a9a5 100644 (file)
--- a/telestatic.sch
+++ b/telestatic.sch
@@ -5,16 +5,15 @@ N 59300 41600 59300 43100 4
 C 41900 57800 1 0 1 gnd.sym
 T 79000 41900 9 30 1 0 0 0 1
 TeleStatic
-C 46200 45900 1 0 0 gnd.sym
-N 43900 46400 42500 46400 4
+C 46200 46500 1 0 0 gnd.sym
+N 43900 47000 42500 47000 4
 {
-T 42500 46500 5 10 1 1 0 0 1
+T 42500 47100 5 10 1 1 0 0 1
 netname=fire_1
 }
-N 46200 47200 46400 47200 4
-N 47300 47200 48300 47200 4
+N 47400 46700 49000 46700 4
 {
-T 47600 47300 5 10 1 1 0 0 1
+T 48300 46800 5 10 1 1 0 0 1
 netname=sense_1
 }
 T 13300 -8600 8 10 0 1 0 0 1
@@ -69,7 +68,7 @@ T 13300 -8600 8 10 0 1 0 0 1
 vendor_part_number=MMA7260QT-ND
 T 13300 -8600 8 10 0 1 0 0 1
 vendor_part_number=MCP9700-E/TO-ND
-C 43700 45200 1 0 0 gnd.sym
+C 43700 45800 1 0 0 gnd.sym
 C 81600 53100 1 0 0 hole_plated.sym
 {
 T 81700 54900 5 10 0 1 0 0 1
@@ -129,45 +128,42 @@ N 46300 47600 50700 47600 4
 T 49600 47700 5 10 1 1 0 0 1
 netname=fet_1
 }
-C 43900 46300 1 0 0 resistor.sym
+C 43900 46900 1 0 0 resistor.sym
 {
-T 44200 46700 5 10 0 1 0 0 1
+T 44200 47300 5 10 0 1 0 0 1
 device=RESISTOR
-T 44300 46700 5 10 1 1 180 0 1
+T 44300 47300 5 10 1 1 180 0 1
 refdes=R8
-T 44700 46700 5 10 1 1 180 0 1
+T 44700 47300 5 10 1 1 180 0 1
 value=100
-T 43900 46300 5 10 0 1 90 0 1
+T 43900 46900 5 10 0 1 90 0 1
 footprint=0402
 }
-N 44800 46400 45300 46400 4
-C 46400 47100 1 0 0 resistor.sym
+N 44800 47000 45800 47000 4
+C 47300 47600 1 270 0 resistor.sym
 {
-T 46700 47500 5 10 0 1 0 0 1
+T 47700 47300 5 10 0 1 270 0 1
 device=RESISTOR
-T 46600 47400 5 10 1 1 0 0 1
+T 47600 47200 5 10 1 1 0 0 1
 refdes=R14
-T 46600 46900 5 10 1 1 0 0 1
+T 47600 46900 5 10 1 1 0 0 1
 value=200k
-T 46400 47100 5 10 0 1 0 0 1
+T 47300 47600 5 10 0 1 270 0 1
 footprint=0402
 }
-C 47300 46000 1 0 0 gnd.sym
-C 47500 46300 1 90 0 resistor.sym
+C 47300 45500 1 0 0 gnd.sym
+C 47500 45800 1 90 0 resistor.sym
 {
-T 47100 46600 5 10 0 1 90 0 1
+T 47100 46100 5 10 0 1 90 0 1
 device=RESISTOR
-T 48000 47000 5 10 1 1 180 0 1
+T 47600 46300 5 10 1 1 0 0 1
 refdes=R20
-T 47500 46295 5 10 0 1 90 0 1
+T 47500 45795 5 10 0 1 90 0 1
 footprint=0402
-T 47700 46500 5 10 1 1 0 0 1
+T 47600 46000 5 10 1 1 0 0 1
 value=22k
 }
 N 60300 44000 65600 44000 4
-N 46200 46400 46300 46400 4
-N 46300 46400 46300 46200 4
-N 46300 47200 46300 47600 4
 C 41000 65400 1 0 0 3.3V-plus.sym
 C 41400 63900 1 90 0 capacitor.sym
 {
@@ -208,15 +204,15 @@ N 41200 64900 41300 64900 4
 N 41200 63800 42300 63800 4
 N 42300 63700 42300 64200 4
 N 41200 63800 41200 63900 4
-C 43900 45500 1 90 0 resistor.sym
+C 43900 46100 1 90 0 resistor.sym
 {
-T 43500 45800 5 10 0 1 90 0 1
+T 43500 46400 5 10 0 1 90 0 1
 device=RESISTOR
-T 43600 46200 5 10 1 1 180 0 1
+T 43600 46800 5 10 1 1 180 0 1
 refdes=R2
-T 43900 45495 5 10 0 1 90 0 1
+T 43900 46095 5 10 0 1 90 0 1
 footprint=0402
-T 43300 45700 5 10 1 1 0 0 1
+T 43300 46300 5 10 1 1 0 0 1
 value=3.3k
 }
 C 49400 71100 1 0 0 3.3V-plus.sym
@@ -662,33 +658,33 @@ netname=v_ldo_in
 }
 N 56800 43900 56800 44000 4
 N 56800 43000 56800 41600 4
-C 43900 48000 1 0 0 3.3V-plus.sym
-N 42500 47400 43600 47400 4
+C 43900 48600 1 0 0 3.3V-plus.sym
+N 42500 48000 43600 48000 4
 {
-T 42500 47500 5 10 1 1 0 0 1
+T 42500 48100 5 10 1 1 0 0 1
 netname=cmp_rail
 }
-N 42500 47800 43600 47800 4
+N 42500 48400 43600 48400 4
 {
-T 42500 47900 5 10 1 1 0 0 1
+T 42500 48500 5 10 1 1 0 0 1
 netname=cmp_ldo_in
 }
-C 43600 47200 1 0 0 opamp-dual.sym
+C 43600 47800 1 0 0 opamp-dual.sym
 {
-T 44700 48500 5 10 0 1 0 0 1
+T 44700 49100 5 10 0 1 0 0 1
 device=IC
-T 43600 47200 5 10 0 1 0 0 1
+T 43600 47800 5 10 0 1 0 0 1
 slot=2
-T 43600 47200 5 10 0 1 0 0 1
+T 43600 47800 5 10 0 1 0 0 1
 footprint=8ufson2x2
-T 44400 47900 5 10 1 1 0 0 1
+T 44400 48500 5 10 1 1 0 0 1
 refdes=U13
-T 44400 47200 5 10 1 1 0 0 1
+T 44400 47800 5 10 1 1 0 0 1
 value=LM293
 }
-C 44000 46900 1 0 0 gnd.sym
-N 44600 47600 45100 47600 4
-N 45100 47600 45100 46400 4
+C 44000 47500 1 0 0 gnd.sym
+N 44600 48200 45100 48200 4
+N 45100 48200 45100 47000 4
 C 46000 49700 1 0 0 STM32L151-48.sym
 {
 T 39600 48100 5 10 0 1 0 0 1
@@ -1221,8 +1217,6 @@ Antenna
 T 80600 45200 9 10 1 0 0 0 2
   SMA is optional
 default is wire whip
-N 45700 46600 45300 46600 4
-N 45300 46600 45300 46400 4
 T 50500 42300 9 10 1 0 0 0 1
 Tolerate power supply up to 30V
 C 58000 41300 1 0 0 gnd.sym
@@ -1490,15 +1484,15 @@ device=CONNECTOR
 }
 T 56900 62400 9 10 1 0 0 0 1
 Force Bootloader
-C 45700 47200 1 270 0 n-fet.sym
+C 45800 47600 1 270 0 n-fet.sym
 {
-T 45600 47500 5 10 0 0 270 0 1
+T 45700 47900 5 10 0 0 270 0 1
 device=PMOS_TRANSISTOR
-T 45700 47300 5 10 1 1 0 0 1
+T 45800 47700 5 10 1 1 0 0 1
 refdes=Q1
-T 45670 47205 5 10 0 1 270 0 1
+T 45770 47605 5 10 0 1 270 0 1
 footprint=TO252FET
-T 45500 47700 5 10 1 1 0 0 1
+T 45600 48100 5 10 1 1 0 0 1
 value=IRLR8743PbF
 }
 C 60300 48900 1 0 0 gnd.sym
@@ -1595,42 +1589,42 @@ N 60300 46900 60400 46900 4
 N 60400 46900 60400 46700 4
 N 60300 47700 60400 47700 4
 N 60400 47700 60400 48100 4
-C 43600 49300 1 0 0 opamp-dual.sym
+C 40900 49900 1 0 0 opamp-dual.sym
 {
-T 44700 50600 5 10 0 1 0 0 1
+T 42000 51200 5 10 0 1 0 0 1
 device=IC
-T 43600 49300 5 10 0 1 0 0 1
+T 40900 49900 5 10 0 1 0 0 1
 slot=1
-T 43600 49300 5 10 0 1 0 0 1
+T 40900 49900 5 10 0 1 0 0 1
 footprint=8ufson2x2
-T 44400 50000 5 10 1 1 0 0 1
+T 41700 50600 5 10 1 1 0 0 1
 refdes=U13
-T 44400 49300 5 10 1 1 0 0 1
+T 41700 49900 5 10 1 1 0 0 1
 value=LM293
 }
-C 43100 49800 1 0 0 nc-left.sym
+C 40400 50400 1 0 0 nc-left.sym
 {
-T 43100 50200 5 10 0 0 0 0 1
+T 40400 50800 5 10 0 0 0 0 1
 value=NoConnection
-T 43100 50600 5 10 0 0 0 0 1
+T 40400 51200 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 43100 49400 1 0 0 nc-left.sym
+C 40400 50000 1 0 0 nc-left.sym
 {
-T 43100 49800 5 10 0 0 0 0 1
+T 40400 50400 5 10 0 0 0 0 1
 value=NoConnection
-T 43100 50200 5 10 0 0 0 0 1
+T 40400 50800 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 44600 49600 1 0 0 nc-right.sym
+C 41900 50200 1 0 0 nc-right.sym
 {
-T 44700 50100 5 10 0 0 0 0 1
+T 42000 50700 5 10 0 0 0 0 1
 value=NoConnection
-T 44700 50300 5 10 0 0 0 0 1
+T 42000 50900 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 43900 50100 1 0 0 3.3V-plus.sym
-C 44000 49000 1 0 0 gnd.sym
+C 41200 50700 1 0 0 3.3V-plus.sym
+C 41300 49600 1 0 0 gnd.sym
 C 56600 43900 1 270 0 cap-polar.sym
 {
 T 57300 43700 5 10 0 0 270 0 1
@@ -2683,6 +2677,8 @@ T 64155 55595 5 10 1 1 0 0 1
 refdes=J3
 T 63800 52500 5 10 0 1 0 0 1
 footprint=282834-8
+T 63800 52500 5 10 0 1 0 0 1
+device=CONNECTOR
 }
 N 63800 53800 63500 53800 4
 N 63800 53000 63500 53000 4
@@ -2719,7 +2715,9 @@ refdes=J12
 T 42100 40700 5 10 1 1 180 0 1
 value=NTC_A
 T 42300 44600 5 10 0 1 180 6 1
-footprint=100mil5x2
+footprint=1-338068-0
+T 42300 44600 5 10 0 1 0 0 1
+device=CONNECTOR
 }
 N 42500 40700 42500 44500 4
 N 42500 44500 42300 44500 4
@@ -2892,3 +2890,19 @@ C 42400 40400 1 0 0 gnd.sym
 N 42700 55300 42200 55300 4
 N 42200 55300 42200 54300 4
 N 42700 54900 42200 54900 4
+C 47300 48500 1 270 0 resistor.sym
+{
+T 47700 48200 5 10 0 1 270 0 1
+device=RESISTOR
+T 47600 48100 5 10 1 1 0 0 1
+refdes=R17
+T 47600 47800 5 10 1 1 0 0 1
+value=200k
+T 47300 48500 5 10 0 1 270 0 1
+footprint=0402
+}
+N 47400 48500 46600 48500 4
+{
+T 47100 48550 5 10 1 1 0 6 1
+netname=v_lipo
+}