}
C 76000 51800 1 0 0 3.3V-plus.sym
C 81700 43000 1 0 0 gnd.sym
-N 75600 47800 75000 47800 4
+N 76700 48200 75500 48200 4
{
-T 75200 47900 5 10 1 1 0 0 1
+T 75500 48300 5 10 1 1 0 0 1
netname=cts2
}
N 76700 48600 75500 48600 4
T 71900 54500 5 10 0 1 0 0 1
footprint=TI-QFN32
}
-C 64600 60000 1 90 0 capacitor.sym
-{
-T 63900 60200 5 10 0 0 90 0 1
-device=CAPACITOR
-T 63700 60200 5 10 0 0 90 0 1
-symversion=0.1
-T 64600 60000 5 10 0 1 90 0 1
-footprint=0402
-T 64500 60600 5 10 1 1 0 0 1
-refdes=C50
-T 64500 60200 5 10 1 1 0 0 1
-value=0.1uF
-}
C 65500 60000 1 90 0 capacitor.sym
{
T 64800 60200 5 10 0 0 90 0 1
value=0.1uF
}
N 63500 59900 66200 59900 4
-N 64400 59900 64400 60000 4
N 65300 59900 65300 60000 4
N 66200 59900 66200 60000 4
N 81800 43300 81800 45400 4
C 63100 52600 1 0 0 ABM8.sym
{
T 63100 52600 5 10 0 0 0 0 1
-footprint=ABM8
+footprint=NDK32
T 63000 53200 5 10 1 1 0 0 1
refdes=X2
T 63500 53200 5 10 1 1 0 0 1
value=32mhz
+T 63100 52600 5 10 0 1 0 0 1
+device=CRYSTAL
}
C 63700 52300 1 0 0 gnd.sym
C 63000 52300 1 0 0 gnd.sym
T 75500 47100 5 10 1 1 0 0 1
netname=bt_p0_5
}
-N 75000 45800 76700 45800 4
-{
-T 75500 45900 5 10 1 1 0 0 1
-netname=bt_p1_3
-}
N 75500 46200 76700 46200 4
{
T 75500 46300 5 10 1 1 0 0 1
T 70200 47400 5 10 1 1 0 0 1
netname=bt_p0_5
}
-N 69700 46100 70900 46100 4
-{
-T 70200 46200 5 10 1 1 0 0 1
-netname=bt_p1_3
-}
N 69700 46500 70900 46500 4
{
T 70200 46600 5 10 1 1 0 0 1
T 70200 44600 5 10 1 1 0 0 1
netname=bt_p3_7
}
-C 75000 47200 1 0 1 conn-3.sym
-{
-T 74500 48500 5 10 1 1 0 6 1
-refdes=J1
-T 75000 47200 5 10 0 1 0 0 1
-footprint=50mil3pin
-T 75000 47200 5 10 0 1 0 0 1
-device=CONNECTOR
-T 75000 47200 5 10 0 1 0 0 1
-loadstatus=noload
-}
-N 76700 48200 75000 48200 4
-{
-T 75500 48300 5 10 1 1 0 0 1
-netname=bt_p0_0
-}
-N 75000 45800 75000 47400 4
N 54200 43300 53900 43300 4
N 53900 43300 53900 42200 4
-N 69700 47700 70900 47700 4
-{
-T 70200 47800 5 10 1 1 0 0 1
-netname=bt_p0_0
-}
N 62400 51200 62400 51600 4
N 62400 51600 61600 51600 4
N 61600 51600 61600 54100 4
T 79895 51400 5 10 1 1 0 0 1
value=RN4678
T 77095 51800 5 10 0 0 0 0 1
-footprint=BM70BLES1FC2
+footprint=RN4678
+T 76700 43200 5 10 0 1 0 0 1
+device=IC
}
N 82100 47400 82100 47000 4
N 81700 47400 82100 47400 4
T 77100 40800 9 10 1 0 0 0 2
Copyright 2017 by Bdale Garbee <bdale@gag.com>
Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL
+C 76200 45700 1 0 0 nc-left.sym
+{
+T 76200 46100 5 10 0 0 0 0 1
+value=NoConnection
+T 76200 46500 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 69700 46000 1 0 0 nc-right.sym
+{
+T 69800 46500 5 10 0 0 0 0 1
+value=NoConnection
+T 69800 46700 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 69700 47600 1 0 0 nc-right.sym
+{
+T 69800 48100 5 10 0 0 0 0 1
+value=NoConnection
+T 69800 48300 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 69700 48800 1 0 0 nc-right.sym
+{
+T 69800 49300 5 10 0 0 0 0 1
+value=NoConnection
+T 69800 49500 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 53700 45600 1 0 0 nc-left.sym
+{
+T 53700 46000 5 10 0 0 0 0 1
+value=NoConnection
+T 53700 46400 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+C 81700 50900 1 0 0 nc-right.sym
+{
+T 81800 51400 5 10 0 0 0 0 1
+value=NoConnection
+T 81800 51600 5 10 0 0 0 0 1
+device=DRC_Directive
+}