+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# target configuration for
# Xilinx ZynqMP (UltraScale+ / A53)
for { set _core 0 } { $_core < $_cores } { incr _core } {
cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \
- -ctibase [lindex $CTIBASE $_core]
+ -baseaddr [lindex $CTIBASE $_core]
set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \
-dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core"
eval $_command
}
+target create uscale.axi mem_ap -dap uscale.dap -ap-num 0
+
eval $_smp_command
targets $_TARGETNAME.0
proc core_up { args } {
global _TARGETNAME
- foreach { core } [set args] {
+ foreach core $args {
$_TARGETNAME.$core arp_examine
}
}