target: add initial imx7.cfg

[fw/openocd] / tcl / target / ti_tms570.cfg

diff --git a/tcl/target/ti_tms570.cfg b/tcl/target/ti_tms570.cfg
index 014c76c11d6c9f7d065f8634f0bb2f9e1eb91cbe..21da6c017a0a8f32e9eb7cf9b261a457ecce1b6a 100644 (file)
--- a/tcl/target/ti_tms570.cfg
+++ b/tcl/target/ti_tms570.cfg
@@ -16,26 +16,44 @@ if { [info exists ENDIAN] } {
 source [find target/icepick.cfg]
 
 # Main DAP
+# DAP_TAPID should be set before source-ing this file
 if { [info exists DAP_TAPID] } {
        set _DAP_TAPID $DAP_TAPID
-} else {
-       set _DAP_TAPID 0x0B8A002F
 }
 jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
 jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
 
 # ICEpick-C (JTAG route controller)
+# JRC_TAPID should be set before source-ing this file
 if { [info exists JRC_TAPID] } {
        set _JRC_TAPID $JRC_TAPID
-} else {
-       set _JRC_TAPID 0x0B8A002F
 }
+
+set _JRC_TAPID2 0x0B7B302F
+set _JRC_TAPID3 0x0B95502F
+set _JRC_TAPID4 0x0B97102F
+set _JRC_TAPID5 0x0D8A002F
+set _JRC_TAPID6 0x2B8A002F
+set _JRC_TAPID7 0x2D8A002F
+set _JRC_TAPID8 0x3B8A002F
+set _JRC_TAPID9 0x3D8A002F
+
+
 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
-       -expected-id $_JRC_TAPID -ignore-version
+       -expected-id $_JRC_TAPID \
+       -expected-id $_JRC_TAPID2 \
+       -expected-id $_JRC_TAPID3 \
+       -expected-id $_JRC_TAPID4 \
+       -expected-id $_JRC_TAPID5 \
+       -expected-id $_JRC_TAPID6 \
+       -expected-id $_JRC_TAPID7 \
+       -expected-id $_JRC_TAPID8 \
+       -expected-id $_JRC_TAPID9 \
+       -ignore-version
 jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
 jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
 
-# Cortex R4 target
+# Cortex-R4 target
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_r4 -endian $_ENDIAN \
        -chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x00001003