rename jtag_nsrst_delay as adapter_nsrst_delay

[fw/openocd] / tcl / target / telo.cfg

diff --git a/tcl/target/telo.cfg b/tcl/target/telo.cfg
index 836b225273b19e0c6c005a5526a0e0dde07cfb8a..40674b9d45b06a1ab02936a3fb35e9608a822689 100644 (file)
--- a/tcl/target/telo.cfg
+++ b/tcl/target/telo.cfg
@@ -1,9 +1,61 @@
-source [find c100.cfg]
+source [find target/c100.cfg]
+# basic register defintion for C100
+source [find target/c100regs.tcl]
+# board-config info
+source [find target/c100config.tcl]
+# C100 helper functions
+source [find target/c100helper.tcl]
 
-# boots from NOR on CS0:  8 MBytes CFI flash, 16-bit bus
-# it's really 16MB but the upper 8mb is controller via gpio?
-flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
 
-#
-gdb_memory_map enable
+# Telo board & C100 support trst and srst
+# Note that libftd2xx.so tries to assert srst
+# which break this script
+# use libftdi.so library instead with this script
+# make the reset asserted to
+# allow RC circuit to discharge for: [ms]
+jtag_nsrst_assert_width 100
+jtag_ntrst_assert_width 100
+# don't talk to JTAG after reset for: [ms]
+adapter_nsrst_delay 100
+jtag_ntrst_delay 100
+reset_config trst_and_srst separate
+
+
+
+
+# issue telnet: reset init
+# issue gdb: monitor reset init
+$_TARGETNAME configure -event reset-init {
+       adapter_khz 100
+       # this will setup Telo board
+       setupTelo
+       #turn up the JTAG speed
+       adapter_khz 3000
+       puts "JTAG speed now 3MHz"
+       puts "type helpC100 to get help on C100"
+}
+
+$_TARGETNAME configure -event reset-deassert-post {
+       # Force target into ARM state.
+#      soft_reset_halt # not implemented on ARM11
+       puts "Detected SRSRT asserted on C100.CPU"
+
+}
+
+$_TARGETNAME configure -event reset-assert-post {
+  puts "Assering reset"
+  #sleep 10
+}
+
+proc power_restore {} { puts "Sensed power restore. No action." }
+proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
+
+
+# boots from NOR on CS0:  8 MBytes CFI flash, 16-bit bus
+# it's really 16MB but the upper 8mb is controller via gpio
+# openocd does not support 'complex reads/writes' to NOR
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
 
+# writing data to memory does not work without this
+memwrite burst disable