mips: optimize write code for speed

[fw/openocd] / tcl / target / str750.cfg

diff --git a/tcl/target/str750.cfg b/tcl/target/str750.cfg
index 2fabc126e49d745dc62c8115293285a861dff49f..e9167279decb8aaf0d2fb8bdfc5c502e79f29bf7 100644 (file)
--- a/tcl/target/str750.cfg
+++ b/tcl/target/str750.cfg
@@ -1,21 +1,21 @@
 #STR750 CPU
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME str750
+   set _CHIPNAME str750
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
 if { [info exists CPUTAPID] } {
-   set  _CPUTAPID $CPUTAPID
+   set _CPUTAPID $CPUTAPID
 } else {
-   set  _CPUTAPID 0x4f1f0041
+   set _CPUTAPID 0x4f1f0041
 }
 
 # jtag speed
@@ -35,7 +35,7 @@ jtag_ntrst_delay 500
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
 
-$_TARGETNAME configure -event reset-start  { adapter_khz 10 }
+$_TARGETNAME configure -event reset-start { adapter_khz 10 }
 $_TARGETNAME configure -event reset-init {
        adapter_khz 3000
 
@@ -61,7 +61,7 @@ flash bank $_FLASHNAME str7x 0x200C0000 0x00004000 0 0 $_TARGETNAME STR75x
 
 # Serial NOR on SMI CS0.
 set _FLASHNAME $_CHIPNAME.snor
-flash bank $_FLASHNAME spearsmi 0x80000000 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stmsmi 0x80000000 0 0 0 $_TARGETNAME
 
 source [find mem_helper.tcl]