flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / target / str710.cfg

diff --git a/tcl/target/str710.cfg b/tcl/target/str710.cfg
index 9da69acad4982dd4c026c402650209c60a39b12b..ff89717195da24e8c57775e4a0c9e7faa34d1629 100644 (file)
--- a/tcl/target/str710.cfg
+++ b/tcl/target/str710.cfg
@@ -1,22 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #start slow, speed up after reset
-jtag_khz 10
+adapter speed 10
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME str710
+   set _CHIPNAME str710
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
 if { [info exists CPUTAPID] } {
-   set  _CPUTAPID $CPUTAPID
+   set _CPUTAPID $CPUTAPID
 } else {
-   set  _CPUTAPID 0x3f0f0f0f
+   set _CPUTAPID 0x3f0f0f0f
 }
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
@@ -27,10 +29,18 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -event reset-start { adapter speed 10 }
+$_TARGETNAME configure -event reset-init {
+       adapter speed 6000
 
-$_TARGETNAME configure -event reset-start { jtag_khz 10 }
-$_TARGETNAME configure -event reset-init { jtag_khz 6000 }
+# Because the hardware cannot be interrogated for the protection state
+# of sectors, initialize all the sectors to be unprotected. The initial
+# state is reflected by the driver, too.
+       flash protect 0 0 last off
+       flash protect 1 0 last off
+}
 $_TARGETNAME configure -event gdb-flash-erase-start {
        flash protect 0 0 7 off
        flash protect 1 0 1 off
@@ -39,10 +49,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
 $_TARGETNAME configure -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0
 
 #flash bank str7x <base> <size> 0 0 <target#> <variant>
-set _FLASHNAME $_CHIPNAME.flash
+set _FLASHNAME $_CHIPNAME.flash0
 flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
-set _FLASHNAME $_CHIPNAME.flash
+set _FLASHNAME $_CHIPNAME.flash1
 flash bank $_FLASHNAME str7x 0x400C0000 0x00004000 0 0 $_TARGETNAME STR71x
-
-# For more information about the configuration files, take a look at:
-# openocd.texi