stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices

[fw/openocd] / tcl / target / stm32wlx.cfg

diff --git a/tcl/target/stm32wlx.cfg b/tcl/target/stm32wlx.cfg
index ba16fab6b2d7db3c6b907928872f95401a9b070a..961850ad18476e6204c7a0ba919a003c0fae197c 100644 (file)
--- a/tcl/target/stm32wlx.cfg
+++ b/tcl/target/stm32wlx.cfg
@@ -46,8 +46,8 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp   stm32l4x 0x1fff7000 0 0 0 $_TARGETNAME
 
 # Common knowledges tells JTAG speed should be <= F_CPU/6.
 # F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on