tcl/target: replace event trace-config

[fw/openocd] / tcl / target / stm32wbx.cfg

diff --git a/tcl/target/stm32wbx.cfg b/tcl/target/stm32wbx.cfg
index 138bcf186bba999dd33d749fa86d0063e4e951ed..737b1447c04275624315d5e857f8c5dda6fe34af 100644 (file)
--- a/tcl/target/stm32wbx.cfg
+++ b/tcl/target/stm32wbx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # script for stm32wbx family
 
 #
@@ -46,8 +48,8 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp   stm32l4x 0x1fff7000 0 0 0 $_TARGETNAME
 
 # Common knowledges tells JTAG speed should be <= F_CPU/6.
 # F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
@@ -55,9 +57,9 @@ flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
 #
 # Note that there is a pretty wide band where things are
 # more or less stable, see http://openocd.zylin.com/#/c/3366/
-adapter_khz 500
+adapter speed 500
 
-adapter_nsrst_delay 100
+adapter srst delay 100
 if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
@@ -77,12 +79,12 @@ $_TARGETNAME configure -event reset-init {
     mmw 0x58004000 0x00000102 0  ;# FLASH_ACR |= PRFTBE | 2(Latency)
     mmw 0x58000000 0x00000091 0  ;# RCC_CR = MSI_ON | MSI Range 24 MHz
     # Boost JTAG frequency
-    adapter_khz 4000
+    adapter speed 4000
 }
 
 $_TARGETNAME configure -event reset-start {
     # Reset clock is MSI (4 MHz)
-    adapter_khz 500
+    adapter speed 500
 }
 
 $_TARGETNAME configure -event examine-end {
@@ -95,9 +97,16 @@ $_TARGETNAME configure -event examine-end {
     mmw 0xE004203C 0x00001800 0
 }
 
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+    targets $_targetname
+
     # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
     # change this value accordingly to configure trace pins
     # assignment
     mmw 0xE0042004 0x00000020 0
 }
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"