tcl/target: Add QuickLogic EOS S3 MCU configuration

[fw/openocd] / tcl / target / stm32l4x.cfg

diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index ccee48e971fd827a7a6dcf15a4b78b85438c9253..46e6f7e0db9fe8c92b380054dead5c9f482e6fc9 100644 (file)
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -36,13 +36,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
    jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -55,9 +56,9 @@ flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
 #
 # Note that there is a pretty wide band where things are
 # more or less stable, see http://openocd.zylin.com/#/c/3366/
-adapter_khz 500
+adapter speed 500
 
-adapter_nsrst_delay 100
+adapter srst delay 100
 if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
@@ -77,12 +78,12 @@ $_TARGETNAME configure -event reset-init {
        mww 0x40022000 0x00000103   ;# FLASH_ACR = PRFTBE | 3(Latency)
        mww 0x40021000 0x00000099   ;# RCC_CR = MSI_ON | MSIRGSEL | MSI Range 9
        # Boost JTAG frequency
-       adapter_khz 4000
+       adapter speed 4000
 }
 
 $_TARGETNAME configure -event reset-start {
        # Reset clock is MSI (4 MHz)
-       adapter_khz 500
+       adapter speed 500
 }
 
 $_TARGETNAME configure -event examine-end {