tcl/target/stm32l4x.cfg: Reduce adapter speed before reset.

[fw/openocd] / tcl / target / stm32l4x.cfg

diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index 651699422bcad64cb94bbb85739a618a0a89bb69..dec006985a3a1dda58bc4403e637fcfe8af3a591 100644 (file)
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -58,12 +58,12 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
 
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz
+# Common knowledges tells JTAG speed should be <= F_CPU/6.
+# F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
+# the safe side.
 #
-# Since we may be running of an RC oscilator, we crank down the speed a
-# bit more to be on the safe side. Perhaps superstition, but if are
-# running off a crystal, we can run closer to the limit. Note
-# that there can be a pretty wide band where things are more or less stable.
+# Note that there is a pretty wide band where things are
+# more or less stable, see http://openocd.zylin.com/#/c/3366/
 adapter_khz 500
 
 adapter_nsrst_delay 100
@@ -81,14 +81,19 @@ if {![using_hla]} {
 
 $_TARGETNAME configure -event reset-init {
        # CPU comes out of reset with MSI_ON | MSI_RDY | MSI Range 6 (4 MHz).
-       # Configure system to use MSI 24 MHz clock, compliant with VOS default (2).
-       # 3 WS compliant with VOS=2 and 24 MHz.
-       mww 0x40022000 0x00000102   ;# FLASH_ACR = PRFTBE | 3(Latency)
+       # Use MSI 24 MHz clock, compliant even with VOS == 2.
+       # 3 WS compliant with VOS == 2 and 24 MHz.
+       mww 0x40022000 0x00000103   ;# FLASH_ACR = PRFTBE | 3(Latency)
        mww 0x40021000 0x00000099   ;# RCC_CR = MSI_ON | MSIRGSEL| MSI Range 10
        # Boost JTAG frequency
        adapter_khz 4000
 }
 
+$_TARGETNAME configure -event reset-start {
+       # Reset clock is MSI (4 MHz)
+       adapter_khz 500
+}
+
 $_TARGETNAME configure -event examine-end {
        # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
        mmw 0xE0042004 0x00000007 0