flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51

[fw/openocd] / tcl / target / stm32l1.cfg

diff --git a/tcl/target/stm32l1.cfg b/tcl/target/stm32l1.cfg
index d4673a100c949497e49b1817ad8c1ffff2361b62..054fa9b74f64667d5093f8ebbaef6e0b8a6899f9 100644 (file)
--- a/tcl/target/stm32l1.cfg
+++ b/tcl/target/stm32l1.cfg
@@ -3,6 +3,7 @@
 #
 
 source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
 
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
@@ -44,33 +45,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-if { [info exists BSTAPID] } {
-   # FIXME this never gets used to override defaults...
-   set _BSTAPID $BSTAPID
-} else {
-   # See STM Document RM0038 Section 30.6.1 Rev. 12
-
-   # Low and medium density
-   set _BSTAPID1 0x06416041
-   # Cat.2 device (medium+ density)
-   set _BSTAPID2 0x06429041
-   # Cat.3 device (medium+ density)
-   set _BSTAPID3 0x06427041
-   # Cat.4 device, STM32L15/6xxD or Cat.3 device, some STM32L15/6xxC-A models
-   set _BSTAPID4 0x06436041
-   # Cat.5 device (high density), STM32L15/6xxE
-   set _BSTAPID5 0x06437041
-}
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
-   swj_newdap $_CHIPNAME bs -irlen 5 \
-   -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
-   -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+   jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -107,3 +89,19 @@ $_TARGETNAME configure -event reset-init {
 $_TARGETNAME configure -event reset-start {
        adapter_khz 300
 }
+
+$_TARGETNAME configure -event examine-end {
+       # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
+       mmw 0xE0042004 0x00000007 0
+
+       # Stop watchdog counters during halt
+       # DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
+       mmw 0xE0042008 0x00001800 0
+}
+
+$_TARGETNAME configure -event trace-config {
+       # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
+       # change this value accordingly to configure trace pins
+       # assignment
+       mmw 0xE0042004 0x00000020 0
+}