Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface

[fw/openocd] / tcl / target / stm32h7x.cfg

diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg
index 5220af3b1c4b3d94b740a45ed6de872e9b2d63d9..8258e50312784bc49756e8c1633afc204fa5644e 100644 (file)
--- a/tcl/target/stm32h7x.cfg
+++ b/tcl/target/stm32h7x.cfg
@@ -104,6 +104,23 @@ if {[set $_CHIPNAME.DUAL_CORE]} {
 # Make sure that cpu0 is selected
 targets $_CHIPNAME.cpu0
 
+if { [info exists QUADSPI] && $QUADSPI } {
+   set a [llength [flash list]]
+   set _QSPINAME $_CHIPNAME.qspi
+   flash bank $_QSPINAME stmqspi 0x90000000 0 0 0 $_CHIPNAME.cpu0 0x52005000
+} else {
+   if { [info exists OCTOSPI1] && $OCTOSPI1 } {
+      set a [llength [flash list]]
+      set _OCTOSPINAME1 $_CHIPNAME.octospi1
+      flash bank $_OCTOSPINAME1 stmqspi 0x90000000 0 0 0 $_CHIPNAME.cpu0 0x52005000
+   }
+   if { [info exists OCTOSPI2] && $OCTOSPI2 } {
+      set b [llength [flash list]]
+      set _OCTOSPINAME2 $_CHIPNAME.octospi2
+      flash bank $_OCTOSPINAME2 stmqspi 0x70000000 0 0 0 $_CHIPNAME.cpu0 0x5200A000
+   }
+}
+
 # Clock after reset is HSI at 64 MHz, no need of PLL
 adapter speed 1800
 
@@ -175,10 +192,19 @@ $_CHIPNAME.cpu0 configure -event reset-init {
        adapter speed 4000
 }
 
+# get _CHIPNAME from current target
+proc stm32h7x_get_chipname {} {
+       set t [target current]
+       set sep [string last "." $t]
+       if {$sep == -1} {
+               return $t
+       }
+       return [string range $t 0 [expr $sep - 1]]
+}
+
 if {[set $_CHIPNAME.DUAL_CORE]} {
        $_CHIPNAME.cpu1 configure -event examine-end {
-               # get _CHIPNAME from the current target
-               set _CHIPNAME [regsub ".cpu\\d$" [target current] ""]
+               set _CHIPNAME [stm32h7x_get_chipname]
                global $_CHIPNAME.USE_CTI
 
                # Stop watchdog counters during halt
@@ -214,8 +240,7 @@ proc stm32h7x_mmw {used_target reg setbits clearbits} {
 proc stm32h7x_dbgmcu_mmw {reg_offset setbits clearbits} {
        # use $_CHIPNAME.ap2 if possible, and use the proper dbgmcu base address
        if {![using_hla]} {
-               # get _CHIPNAME from the current target
-               set _CHIPNAME [regsub ".(cpu|ap)\\d*$" [target current] ""]
+               set _CHIPNAME [stm32h7x_get_chipname]
                set used_target $_CHIPNAME.ap2
                set reg_addr [expr 0xE00E1000 + $reg_offset]
        } {
@@ -228,8 +253,8 @@ proc stm32h7x_dbgmcu_mmw {reg_offset setbits clearbits} {
 
 if {[set $_CHIPNAME.USE_CTI]} {
        # create CTI instances for both cores
-       cti create $_CHIPNAME.cti0 -dap $_CHIPNAME.dap -ap-num 0 -ctibase 0xE0043000
-       cti create $_CHIPNAME.cti1 -dap $_CHIPNAME.dap -ap-num 3 -ctibase 0xE0043000
+       cti create $_CHIPNAME.cti0 -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0043000
+       cti create $_CHIPNAME.cti1 -dap $_CHIPNAME.dap -ap-num 3 -baseaddr 0xE0043000
 
        $_CHIPNAME.cpu0 configure -event halted { stm32h7x_cti_prepare_restart_all }
        $_CHIPNAME.cpu1 configure -event halted { stm32h7x_cti_prepare_restart_all }
@@ -238,8 +263,7 @@ if {[set $_CHIPNAME.USE_CTI]} {
        $_CHIPNAME.cpu1 configure -event debug-halted { stm32h7x_cti_prepare_restart_all }
 
        proc stm32h7x_cti_start {} {
-               # get _CHIPNAME from the current target
-               set _CHIPNAME [regsub ".cpu\\d$" [target current] ""]
+               set _CHIPNAME [stm32h7x_get_chipname]
 
                # Configure Cores' CTIs to halt each other
                # TRIGIN0 (DBGTRIGGER) and TRIGOUT0 (EDBGRQ) at CTM_CHANNEL_0
@@ -254,8 +278,7 @@ if {[set $_CHIPNAME.USE_CTI]} {
        }
 
        proc stm32h7x_cti_stop {} {
-               # get _CHIPNAME from the current target
-               set _CHIPNAME [regsub ".cpu\\d$" [target current] ""]
+               set _CHIPNAME [stm32h7x_get_chipname]
 
                $_CHIPNAME.cti0 enable off
                $_CHIPNAME.cti1 enable off
@@ -267,8 +290,7 @@ if {[set $_CHIPNAME.USE_CTI]} {
        }
 
        proc stm32h7x_cti_prepare_restart {cti} {
-               # get _CHIPNAME from the current target
-               set _CHIPNAME [regsub ".cpu\\d$" [target current] ""]
+               set _CHIPNAME [stm32h7x_get_chipname]
 
                # Acknowlodge EDBGRQ at TRIGOUT0
                $_CHIPNAME.$cti write INACK 0x01