target/stm32l5x,stm32u5x: fix trace settings

[fw/openocd] / tcl / target / stm32g4x.cfg

diff --git a/tcl/target/stm32g4x.cfg b/tcl/target/stm32g4x.cfg
index 9f144a07ef07ee8d9bc967e7b54876f2c78591e9..39ed1e38186864d12c933cc7297775b80b9c67df 100644 (file)
--- a/tcl/target/stm32g4x.cfg
+++ b/tcl/target/stm32g4x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # script for stm32g4x family
 
 #
@@ -47,8 +49,8 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp   stm32l4x 0x1fff7000 0 0 0 $_TARGETNAME
 
 if { [info exists QUADSPI] && $QUADSPI } {
        set a [llength [flash list]]
@@ -95,9 +97,16 @@ $_TARGETNAME configure -event examine-end {
        mmw 0xE0042008 0x00001800 0
 }
 
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+       targets $_targetname
+
        # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
        # change this value accordingly to configure trace pins
        # assignment
        mmw 0xE0042004 0x00000020 0
 }
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"