set _CHIPNAME stm32f7x
}
- set _ENDIAN little
+set _ENDIAN little
# Work-area is a space in RAM used for flash programming
# By default use 128kB
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
flash bank $_CHIPNAME.otp stm32f2x 0x1ff0f000 0 0 0 $_TARGETNAME
+# On the STM32F7, the Flash is mapped at address 0x08000000 via the AXI and
+# also address 0x00200000 via the ITCM. The former mapping is read-write in
+# hardware, while the latter is read-only. By presenting an alias, we
+# accomplish two things:
+# (1) We allow writing at 0x00200000 (because the alias acts identically to the
+# original bank), which allows code intended to run from that address to
+# also be linked for loading at that address, simplifying linking.
+# (2) We allow the proper memory map to be delivered to GDB, which will cause
+# it to use hardware breakpoints at the 0x00200000 mapping (correctly
+# identifying it as Flash), which it would otherwise not do. Configuring
+# the Flash via ITCM alias as virtual
+flash bank $_CHIPNAME.itcm-flash.alias virtual 0x00200000 0 0 0 $_TARGETNAME $_FLASHNAME
+
+if { [info exists QUADSPI] && $QUADSPI } {
+ set a [llength [flash list]]
+ set _QSPINAME $_CHIPNAME.qspi
+ flash bank $_QSPINAME stmqspi 0x90000000 0 0 0 $_TARGETNAME 0xA0001000
+}
+
# adapter speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
-adapter_khz 2000
+adapter speed 2000
-adapter_nsrst_delay 100
+adapter srst delay 100
if {[using_jtag]} {
jtag_ntrst_delay 100
}
#
# This target is compatible with connect_assert_srst, which may be set in a
# board file.
-reset_config srst_only srst_nogate
+reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
if {[using_jtag]} {
[[target current] cget -dap] memaccess 16
} {
- adapter_khz 8000
+ adapter speed 8000
}
}
$_TARGETNAME configure -event reset-start {
# Reduce speed since CPU speed will slow down to 16MHz with the reset
- adapter_khz 2000
+ adapter speed 2000
}
-