tcl/esp32s3: check memory protection on gdb attach

[fw/openocd] / tcl / target / stm32f3x.cfg

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index 0c8919f1dc1ddf22822d3abbe8c66ecbf12cdb9c..ebec04f857ec12da94f4bfacc4e373a030893cd8 100644 (file)
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # script for stm32f3x family
 
 #
@@ -28,9 +30,9 @@ if { [info exists WORKAREASIZE] } {
 # bit more to be on the safe side. Perhaps superstition, but if are
 # running off a crystal, we can run closer to the limit. Note
 # that there can be a pretty wide band where things are more or less stable.
-adapter_khz 1000
+adapter speed 1000
 
-adapter_nsrst_delay 100
+adapter srst delay 100
 if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
@@ -49,13 +51,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
    jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -72,7 +75,7 @@ if {![using_hla]} {
 
 proc stm32f3x_default_reset_start {} {
        # Reset clock is HSI (8 MHz)
-       adapter_khz 1000
+       adapter speed 1000
 }
 
 proc stm32f3x_default_examine_end {} {
@@ -92,7 +95,7 @@ proc stm32f3x_default_reset_init {} {
        mmw 0x40021004 0x00000002 0 ;# RCC_CFGR |= SW[1]
 
        # Boost JTAG frequency
-       adapter_khz 8000
+       adapter speed 8000
 }
 
 # Default hooks