target/stm32h7x: add support of dual core variant of STM32H7

[fw/openocd] / tcl / target / stm32f3x.cfg

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index f3ea40bad029abe5eb708a5a7695e76ea70bce9e..86e9f594e38053347387e33122ba7e04717e11d8 100644 (file)
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -49,32 +49,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-if { [info exists BSTAPID] } {
-   set _BSTAPID $BSTAPID
-} else {
-  # STM Document RM0316 rev 5 for STM32F302/303 B/C size
-  set _BSTAPID1 0x06422041
-  # STM Document RM0313 rev 3 for STM32F37x
-  set _BSTAPID2 0x06432041
-  #  STM Document RM364 rev 1 for STM32F334
-  set _BSTAPID3 0x06438041
-  #  STM Document RM316 rev 5 for STM32F303 6/8 size
-  #  STM Document RM365 rev 3 for STM32F302 6/8 size
-  #  STM Document RM366 rev 2 for STM32F301 6/8 size
-  set _BSTAPID4 0x06439041
-  #  STM Document RM016 rev 5 for STM32F303 D/E size
-  set _BSTAPID5 0x06446041
-}
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
- swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
- -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
- -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+   jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0