Magnus Lundin <lundin@mlu.mine.nu> Disable poll while core register initialization

[fw/openocd] / tcl / target / stm32.cfg

diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 04cee2349ae448156f6bb18d8e79f3a6819324da..b2c63783a9dd91deec265bcc543385d19b30e942 100644 (file)
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -57,7 +57,7 @@ if { [info exists BSTAPID ] } {
 }   
 jtag newtap $_CHIPNAME bs  -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0