target/stm32h7x: add support of dual core variant of STM32H7

[fw/openocd] / tcl / target / stellaris.cfg

diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg
index 9804bde79172a6ce4e8c152dff5142fbb53a6c8e..7fffd2a7ca03f03df7293a4c093926854567647b 100644 (file)
--- a/tcl/target/stellaris.cfg
+++ b/tcl/target/stellaris.cfg
@@ -42,7 +42,8 @@ if { [info exists CPUTAPID] } {
 # ... even though SWD ignores all except TAPID, and
 # JTAG shouldn't need anything more then irlen. (and TAPID).
 swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
-       -expected-id $_CPUTAPID -ignore-version
+    -expected-id $_CPUTAPID -ignore-version
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
@@ -52,7 +53,7 @@ if { [info exists WORKAREASIZE] } {
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
 
 # 8K working area at base of ram, not backed up
 #
@@ -155,14 +156,17 @@ $_TARGETNAME configure -event reset-start {
        }
 
        if {$device_class == 0 || $device_class == 1 ||
-               $device_class == 3 || $device_class == 5} {
-               # Sandstorm, Fury, DustDevil and Blizzard are able to use NVIC SYSRESETREQ
-               cortex_m reset_config sysresetreq
+               $device_class == 3 || $device_class == 5 || $device_class == 0xa} {
+               if {![using_hla]} {
+                  # Sandstorm, Fury, DustDevil, Blizzard and Snowflake are able to use NVIC SYSRESETREQ
+                  cortex_m reset_config sysresetreq
+               }
        } else {
-               # Tempest and Firestorm default to using NVIC VECTRESET
-               # peripherals will need reseting manually, see proc reset_peripherals
-               cortex_m reset_config vectreset
-
+               if {![using_hla]} {
+                  # Tempest and Firestorm default to using NVIC VECTRESET
+                  # peripherals will need reseting manually, see proc reset_peripherals
+                  cortex_m reset_config vectreset
+               }
                # reset peripherals, based on code in
                # http://www.ti.com/lit/er/spmz573a/spmz573a.pdf
                reset_peripherals $device_class