source [find cpu/arc/hs.tcl]
set _coreid 0
-set _dbgbase [expr ($_coreid << 13)]
+set _dbgbase [expr {$_coreid << 13}]
# CHIPNAME will be used to choose core family (600, 700 or EM). As far as
# OpenOCD is concerned EM and HS are identical.
$_TARGETNAME configure -dbgbase $_dbgbase
# Flush L2$.
$_TARGETNAME configure -event reset-assert "arc_hs_reset $_TARGETNAME"
-set _coreid [expr $_coreid + 1]
-set _dbgbase [expr ($_coreid << 13)]
+set _coreid [expr {$_coreid + 1}]
+set _dbgbase [expr {$_coreid << 13}]
arc_hs_init_regs
$_TARGETNAME configure -coreid $_coreid
$_TARGETNAME configure -dbgbase $_dbgbase
$_TARGETNAME configure -event reset-assert "arc_common_reset $_TARGETNAME"
-set _coreid [expr $_coreid + 1]
-set _dbgbase [expr ($_coreid << 13)]
+set _coreid [expr {$_coreid + 1}]
+set _dbgbase [expr {$_coreid << 13}]
arc_hs_init_regs
$_TARGETNAME configure -coreid $_coreid
$_TARGETNAME configure -dbgbase $_dbgbase
$_TARGETNAME configure -event reset-assert "arc_common_reset $_TARGETNAME"
-set _coreid [expr $_coreid + 1]
-set _dbgbase [expr ($_coreid << 13)]
+set _coreid [expr {$_coreid + 1}]
+set _dbgbase [expr {$_coreid << 13}]
arc_hs_init_regs
$_TARGETNAME configure -coreid $_coreid
$_TARGETNAME configure -dbgbase $_dbgbase
$_TARGETNAME configure -event reset-assert "arc_common_reset $_TARGETNAME"
-set _coreid [expr $_coreid + 1]
-set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
+set _coreid [expr {$_coreid + 1}]
+set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
arc_hs_init_regs
# Enable L2 cache support for core 1.