+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2014-2015,2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Xilinx Spartan-6 XC6SLX45 FPGA on EM Starter Kit v1.
-expected-id 0x200044b1
set _coreid 0
-set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
+set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME \
-coreid 0 -dbgbase $_dbgbase -endian little