tcl/target/ti_k3: Add J721S2 SoC

[fw/openocd] / tcl / target / samsung_s3c2450.cfg

diff --git a/tcl/target/samsung_s3c2450.cfg b/tcl/target/samsung_s3c2450.cfg
index f7b7393031c8b93b176a7602f9ba00b2f69bf781..248255719839c97f43aaaafc11ded8a8bfae9881 100644 (file)
--- a/tcl/target/samsung_s3c2450.cfg
+++ b/tcl/target/samsung_s3c2450.cfg
@@ -4,40 +4,39 @@
 
 
 # FIX!!! what to use here?
-# 
+#
 # RCLK?
-# 
-# jtag_khz 0
+#
+# adapter speed 0
 #
 # Really low clock during reset?
 #
-# jtag_khz 1
+# adapter speed 1
 
 if { [info exists CHIPNAME] } {
-  set  _CHIPNAME $CHIPNAME
+  set _CHIPNAME $CHIPNAME
 } else {
-  set  _CHIPNAME s3c2450
+  set _CHIPNAME s3c2450
 }
 
 if { [info exists ENDIAN] } {
-  set  _ENDIAN $ENDIAN
+  set _ENDIAN $ENDIAN
 } else {
  # this defaults to a bigendian
-  set  _ENDIAN little
+  set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
 } else {
- # force an error till we get a good number
   set _CPUTAPID 0x07926f0f
 }
 
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # FIX!!!!! should this really use srst_pulls_trst?
 # With srst_pulls_trst "reset halt" will not reset into the
@@ -46,4 +45,4 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA
 # However, without "srst_pulls_trst", then "reset halt" produces weird
 # errors:
 # WARNING: unknown debug reason: 0x0
-reset_config trst_and_srst
\ No newline at end of file
+reset_config trst_and_srst