#
# RCLK?
#
-# adapter_khz 0
+# adapter speed 0
#
# Really low clock during reset?
#
-# adapter_khz 1
+# adapter speed 1
if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
+ set _CHIPNAME $CHIPNAME
} else {
- set _CHIPNAME s3c2450
+ set _CHIPNAME s3c2450
}
if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
+ set _ENDIAN $ENDIAN
} else {
# this defaults to a bigendian
- set _ENDIAN little
+ set _ENDIAN little
}
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x07926f0f
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
# FIX!!!!! should this really use srst_pulls_trst?
# With srst_pulls_trst "reset halt" will not reset into the