flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / target / pxa3xx.cfg

diff --git a/tcl/target/pxa3xx.cfg b/tcl/target/pxa3xx.cfg
index 62c325b76f9b90a42d22683fd1ead8065f44bdbb..d670c84c856aef108b0737346a3a741d02a3355f 100644 (file)
--- a/tcl/target/pxa3xx.cfg
+++ b/tcl/target/pxa3xx.cfg
@@ -1,67 +1,69 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Marvell PXA3xx
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME pxa3xx
+   set _CHIPNAME pxa3xx
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
 # IDs for all currently known PXA3xx chips
-if { [info exists CPUTAPID_PXA30X_A0 ] } {
+if { [info exists CPUTAPID_PXA30X_A0] } {
    set _CPUTAPID_PXA30X_A0 $CPUTAPID_PXA30X_A0
 } else {
    set _CPUTAPID_PXA30X_A0 0x0E648013
 }
-if { [info exists CPUTAPID_PXA30X_A1 ] } {
+if { [info exists CPUTAPID_PXA30X_A1] } {
    set _CPUTAPID_PXA30X_A1 $CPUTAPID_PXA30X_A1
 } else {
    set _CPUTAPID_PXA30X_A1 0x1E648013
 }
-if { [info exists CPUTAPID_PXA31X_A0 ] } {
+if { [info exists CPUTAPID_PXA31X_A0] } {
    set _CPUTAPID_PXA31X_A0 $CPUTAPID_PXA31X_A0
 } else {
    set _CPUTAPID_PXA31X_A0 0x0E649013
 }
-if { [info exists CPUTAPID_PXA31X_A1 ] } {
+if { [info exists CPUTAPID_PXA31X_A1] } {
    set _CPUTAPID_PXA31X_A1 $CPUTAPID_PXA31X_A1
 } else {
    set _CPUTAPID_PXA31X_A1 0x1E649013
 }
-if { [info exists CPUTAPID_PXA31X_A2 ] } {
+if { [info exists CPUTAPID_PXA31X_A2] } {
    set _CPUTAPID_PXA31X_A2 $CPUTAPID_PXA31X_A2
 } else {
    set _CPUTAPID_PXA31X_A2 0x2E649013
 }
-if { [info exists CPUTAPID_PXA31X_B0 ] } {
+if { [info exists CPUTAPID_PXA31X_B0] } {
    set _CPUTAPID_PXA31X_B0 $CPUTAPID_PXA31X_B0
 } else {
    set _CPUTAPID_PXA31X_B0 0x3E649013
 }
-if { [info exists CPUTAPID_PXA32X_B1 ] } {
+if { [info exists CPUTAPID_PXA32X_B1] } {
    set _CPUTAPID_PXA32X_B1 $CPUTAPID_PXA32X_B1
 } else {
    set _CPUTAPID_PXA32X_B1 0x5E642013
 }
-if { [info exists CPUTAPID_PXA32X_B2 ] } {
+if { [info exists CPUTAPID_PXA32X_B2] } {
    set _CPUTAPID_PXA32X_B2 $CPUTAPID_PXA32X_B2
 } else {
    set _CPUTAPID_PXA32X_B2 0x6E642013
 }
-if { [info exists CPUTAPID_PXA32X_C0 ] } {
+if { [info exists CPUTAPID_PXA32X_C0] } {
    set _CPUTAPID_PXA32X_C0 $CPUTAPID_PXA32X_C0
 } else {
    set _CPUTAPID_PXA32X_C0 0x7E642013
 }
 
-# set adapter_nsrst_delay to the delay introduced by your reset circuit
+# set adapter srst delay to the delay introduced by your reset circuit
 # the rest of the needed delays are built into the openocd program
-adapter_nsrst_delay 260
+adapter srst delay 260
 
 # set the jtag_ntrst_delay to the delay introduced by a reset circuit
 # the rest of the needed delays are built into the openocd program
@@ -80,7 +82,7 @@ jtag newtap $_CHIPNAME cpu -irlen 11 -ircapture 0x1 -irmask 0x7f \
        -expected-id $_CPUTAPID_PXA32X_C0
 
 target create $_TARGETNAME xscale -endian $_ENDIAN \
-       -chain-position $_TARGETNAME -variant pxa3xx
+       -chain-position $_TARGETNAME
 
 # work area in internal RAM.
 $_TARGETNAME configure -work-area-phys 0x5c030000 -work-area-size 0x10000