tcl/fpga: add Lattice MachXO3 family support

[fw/openocd] / tcl / target / pxa255.cfg

diff --git a/tcl/target/pxa255.cfg b/tcl/target/pxa255.cfg
index 4b222de081e56d9b21b2f7354b388972f86633d8..14ee13c372be8d12fd748d2c94b399353b9afc4e 100644 (file)
--- a/tcl/target/pxa255.cfg
+++ b/tcl/target/pxa255.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # PXA255 chip ... originally from Intel, PXA line was sold to Marvell.
 # This chip is now at end-of-life.  Final orders have been taken.
 
@@ -28,8 +30,8 @@ target create $_TARGETNAME xscale -endian $_ENDIAN \
 # PXA255 comes out of reset using 3.6864 MHz oscillator.
 # Until the PLL kicks in, keep the JTAG clock slow enough
 # that we get no errors.
-adapter_khz 300
-$_TARGETNAME configure -event "reset-start" { adapter_khz 300 }
+adapter speed 300
+$_TARGETNAME configure -event "reset-start" { adapter speed 300 }
 
 # both TRST and SRST are *required* for debug
 # DCSR is often accessed with SRST active