+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _WORKAREASIZE 0x4000
}
-adapter_nsrst_delay 100
+adapter srst delay 100
jtag_ntrst_delay 100
#jtag scan chain
global _PIC32MX_DATASIZE
global _WORKAREASIZE
set _PIC32MX_DATASIZE 0x800
-set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)]
+set _PIC32MX_PROGSIZE [expr {$_WORKAREASIZE - $_PIC32MX_DATASIZE}]
$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_PIC32MX_PROGSIZE -work-area-backup 0
$_TARGETNAME configure -event reset-init {
# from reset the pic32 cannot execute code in ram - enable ram execution
# minimum offset from start of ram is 2k
#
-
global _PIC32MX_DATASIZE
global _WORKAREASIZE
- # BMXCON
- mww 0xbf882000 0x001f0040
+ # BMXCON set 0 wait state option by clearing BMXWSDRM bit, bit 6
+ mww 0xbf882000 0x001f0000
# BMXDKPBA: 2k kernel data @ 0xa0000000
mww 0xbf882010 $_PIC32MX_DATASIZE
# BMXDUDBA: 14k kernel program @ 0xa0000800 - (BMXDUDBA - BMXDKPBA)