PIC32: enable ram execution

[fw/openocd] / tcl / target / pic32mx.cfg

diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index e0ebdc267c318bb735fc3688cb8342b678685be4..1561d7303eb5626d404c0de161b6ae9759168087 100644 (file)
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -31,7 +31,23 @@ jtag newtap $_CHIPNAME cpu -irlen 5  -ircapture 0x1 -irmask 0x1f -expected-id $_
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
 
-$_TARGETNAME configure -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size 16384 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init {
+       #
+       # from reset the pic32 cannot execute code in ram - enable ram execution
+       # minimum offset from start of ram is 2k
+       #
+
+       # BMXCON
+       mww 0xbf882000 0x001f0040
+       # BMXDKPBA: 0xa0000800
+       mww 0xbf882010 0x00000800
+       # BMXDUDBA
+       mww 0xbf882020 0x00004000
+       # BMXDUPBA
+       mww 0xbf882030 0x00004000
+}
 
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME pic32mx 0xbd000000 0 0 0 $_TARGETNAME