# Select the TAP core we are using
tap_select vjtag
+
+} elseif { [string compare $_TAP_TYPE "XILINX_BSCAN"] == 0 } {
+
+ if { [info exists FPGATAPID] } {
+ set _FPGATAPID $FPGATAPID
+ } else {
+ puts "You need to set your FPGA JTAG ID"
+ shutdown
+ }
+
+ jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id $_FPGATAPID
+
+ set _TARGETNAME $_CHIPNAME.cpu
+ target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
+
+ # Select the TAP core we are using
+ tap_select xilinx_bscan
} else {
# OpenCores Mohor JTAG TAP ID
set _CPUTAPID 0x14951185
# Select the debug unit core we are using. This debug unit as an option.
-proc ADBG_USE_HISPEED {} { return 1 }
+set ADBG_USE_HISPEED 1
+set ENABLE_JSP_SERVER 2
+set ENABLE_JSP_MULTI 4
# If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped
# on burst reads and writes to improve download speeds.
# This option must match the RTL configured option.
-du_select adv [ADBG_USE_HISPEED]
+du_select adv [expr {$ADBG_USE_HISPEED | $ENABLE_JSP_SERVER | $ENABLE_JSP_MULTI}]