tcl/target: stm32[fl]4x: document the settings for trace

[fw/openocd] / tcl / target / omap3530.cfg

diff --git a/tcl/target/omap3530.cfg b/tcl/target/omap3530.cfg
index 078d7f24db97b3a431e8a7d8ba8b226bca019d3a..bd8b111a0ba8758c17c490666a59a150853c0b93 100644 (file)
--- a/tcl/target/omap3530.cfg
+++ b/tcl/target/omap3530.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # TI OMAP3530
 # http://focus.ti.com/docs/prod/folders/print/omap3530.html
 # Other OMAP3 chips remove DSP and/or the OpenGL support
@@ -63,8 +65,8 @@ proc omap3_dbginit {target} {
 # be absolutely certain the JTAG clock will work with the worst-case
 # 16.8MHz/2 = 8.4MHz core clock, even before a bootloader kicks in.
 # OK to speed up *after* PLL and clock tree setup.
-adapter_khz 1000
-$_TARGETNAME configure -event "reset-start" { adapter_khz 1000 }
+adapter speed 1000
+$_TARGETNAME configure -event "reset-start" { adapter speed 1000 }
 
 # Assume SRST is unavailable (e.g. TI-14 JTAG), so we must assert reset
 # ourselves using PRM_RSTCTRL.  RST_GS (2) is a warm reset, like ICEpick