target: Add LS1046A

[fw/openocd] / tcl / target / ls1046a.cfg

diff --git a/tcl/target/ls1046a.cfg b/tcl/target/ls1046a.cfg
new file mode 100644 (file)
index 0000000..3d96a99
--- /dev/null
+++ b/tcl/target/ls1046a.cfg
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# NXP LS1046A
+
+if { [info exists CHIPNAME] } {
+       set _CHIPNAME $CHIPNAME
+} else {
+       set _CHIPNAME ls1046a
+}
+
+if { [info exists DAP_TAPID] } {
+       set _DAP_TAPID $DAP_TAPID
+} else {
+       set _DAP_TAPID 0x5ba00477
+}
+
+if { [info exists SAP_TAPID] } {
+       set _SAP_TAPID $SAP_TAPID
+} else {
+       set _SAP_TAPID 0x06b3001d
+}
+
+jtag newtap $_CHIPNAME dap -irlen 4 -expected-id $_DAP_TAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.dap
+
+target create $_CHIPNAME.axi mem_ap -dap $_CHIPNAME.dap -ap-num 0
+
+set _CPU_BASE 0x80400000
+set _CPU_STRIDE 0x100000
+set _CPU_DBGOFF 0x10000
+set _CPU_CTIOFF 0x20000
+
+set _TARGETS {}
+for {set i 0} {$i < 4} {incr i} {
+       set _BASE [expr {$_CPU_BASE + $_CPU_STRIDE * $i}]
+       cti create $_CHIPNAME.cti$i -dap $_CHIPNAME.dap -ap-num 1 \
+               -baseaddr [expr {$_BASE + $_CPU_CTIOFF}]
+       target create $_CHIPNAME.cpu$i aarch64 -dap $_CHIPNAME.dap \
+               -cti $_CHIPNAME.cti$i -dbgbase [expr {$_BASE + $_CPU_DBGOFF}] \
+               -coreid $i {*}[expr {$i ? {-defer-examine} : {-rtos hwthread} }]
+       lappend _TARGETS $_CHIPNAME.cpu$i
+}
+
+target smp {*}$_TARGETS
+
+jtag newtap $_CHIPNAME sap -irlen 8 -expected-id $_SAP_TAPID
+target create $_CHIPNAME.sap ls1_sap -chain-position $_CHIPNAME.sap -endian big
+
+proc core_up { args } {
+    foreach core $args {
+        $::_CHIPNAME.cpu$core arp_examine
+    }
+}
+
+targets $_CHIPNAME.cpu0
+
+adapter speed 10000