tcl/target: add SPDX tag

[fw/openocd] / tcl / target / lpc8nxx.cfg

diff --git a/tcl/target/lpc8nxx.cfg b/tcl/target/lpc8nxx.cfg
index b9332909a962b04e8080d6c59f45047492daa9a9..859e99b6a3ba2298176072e301d1711b335de466 100644 (file)
--- a/tcl/target/lpc8nxx.cfg
+++ b/tcl/target/lpc8nxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # NXP LPC8Nxx NHS31xx Cortex-M0+ with 8kB SRAM
 # Copyright (C) 2018 by Jean-Christian de Rivaz
 # Based on NXP proposal https://community.nxp.com/message/1011149
@@ -22,7 +24,7 @@ if {![using_hla]} {
        # If srst is not fitted use SYSRESETREQ to  perform a soft reset
        cortex_m reset_config sysresetreq
 }
-adapter_nsrst_delay 100
+adapter srst delay 100
 
 $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x1ff0 -work-area-backup 0
 
@@ -56,7 +58,7 @@ proc set_sysclk_500khz {} {
        echo "Notice: sysclock set to 500kHz."
 }
 
-# Do not remap the ARM interrupt vectors to anything but the beginning ot the flash.
+# Do not remap the ARM interrupt vectors to anything but the beginning of the flash.
 # Table System memory remap register (SYSMEMREMAP, address 0x4004 8000) bit description
 # Bit Symbol  Value   Description
 # 0   map         -   interrupt vector remap. 0 after boot.