+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC8Nxx NHS31xx Cortex-M0+ with 8kB SRAM
# Copyright (C) 2018 by Jean-Christian de Rivaz
# Based on NXP proposal https://community.nxp.com/message/1011149
echo "Notice: sysclock set to 500kHz."
}
-# Do not remap the ARM interrupt vectors to anything but the beginning ot the flash.
+# Do not remap the ARM interrupt vectors to anything but the beginning of the flash.
# Table System memory remap register (SYSMEMREMAP, address 0x4004 8000) bit description
# Bit Symbol Value Description
# 0 map - interrupt vector remap. 0 after boot.