flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / tcl / target / lpc3250.cfg

diff --git a/tcl/target/lpc3250.cfg b/tcl/target/lpc3250.cfg
index d64e15f168b9beeddd87de37c9f33ba1da0b1f7a..244d9814c5bbe772fc5a5dbd622a687d5c408dce 100644 (file)
--- a/tcl/target/lpc3250.cfg
+++ b/tcl/target/lpc3250.cfg
@@ -1,25 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # lpc3250 config
 #
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME lpc3250
+   set _CHIPNAME lpc3250
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
    set _CPUTAPID 0x17900f0f
 }
 
-if { [info exists SJCTAPID ] } {
+if { [info exists CPUTAPID_REV_A0] } {
+   set _CPUTAPID_REV_A0 $CPUTAPID_REV_A0
+} else {
+   set _CPUTAPID_REV_A0 0x17926f0f
+}
+
+if { [info exists SJCTAPID] } {
    set _SJCTAPID $SJCTAPID
 } else {
    set _SJCTAPID 0x1b900f0f
@@ -27,7 +35,8 @@ if { [info exists SJCTAPID ] } {
 
 jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_SJCTAPID
 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID \
+     -expected-id $_CPUTAPID_REV_A0
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian little -chain-position $_TARGETNAME -work-area-phys 0x00000000 -work-area-size 0x7d0000 -work-area-backup 0