Update "flash bank" helper comments for LPC2xxx chips

[fw/openocd] / tcl / target / lpc2378.cfg

diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index d34ffae66deb648e59f4925cbc7d0158e82c7138..a3c0992309c5839231fdcbec05df2e52fb3ea2d1 100644 (file)
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # LPC2000 -> SRST causes TRST
@@ -31,19 +31,20 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
 
 # LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
 
 $_TARGETNAME configure -event reset-init {
        # Force target into ARM state
-       armv4_5 core_state arm
+       arm core_state arm
        #do not remap 0x0000-0x0020 to anything but the flash
        mwb 0xE01FC040 0x01
 }
 
 # LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
 # After reset the chip uses its internal 4MHz RC oscillator
-#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
-flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum
+# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
 
 # 4MHz / 6 = 666kHz, so use 500
-jtag_khz 500
+adapter_khz 500