tcl/target: add SPDX tag

[fw/openocd] / tcl / target / lpc2148.cfg

diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg
index 7665ee755078b499456a2120cabddca2c3711690..fda622f11d9e240cb46e3e43243ea14a8abd4246 100644 (file)
--- a/tcl/target/lpc2148.cfg
+++ b/tcl/target/lpc2148.cfg
@@ -1,45 +1,23 @@
-# Proc that can be invoked to create a special version of
-# the LPC2148
-proc setup_lpc2148 {chipname tapids} {
-       # Use RCLK. If RCLK is not available fall back to 500kHz.
-       #
-       # Depending on cabling you might be able to eek this up to 2000kHz.
-       jtag_rclk 500
-       
-       adapter_nsrst_delay 200
-       jtag_ntrst_delay 200
-       
-       # NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
-       # JTAG, power-on reset is not enough, i.e. you need to perform a
-       # reset before being able to talk to the LPC2148, attach is not possible.
-       reset_config trst_and_srst
-       
-       eval "jtag newtap $chipname cpu -irlen 4 -ircapture 0x1 -irmask 0xf $tapids"
-       
-       target create $chipname.cpu arm7tdmi -chain-position $chipname.cpu
-       
-       $chipname.cpu configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
-       
-       $chipname.cpu configure -event reset-init {
-               # Force target into ARM state
-               arm core_state arm
-       
-               # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
-               # "User Flash Mode" where interrupt vectors are _not_ remapped,
-               # and reside in flash instead).
-               #
-               # See section 7.1 on page 32 ("Memory Mapping control register") in
-               # "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
-               # http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
-               mwb 0xE01FC040 0x01
-       }
-       
-       # flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
-       flash bank $chipname.flash lpc2000 0x0 0x7d000 0 0 $chipname.cpu lpc2000_v2 14765 calc_checksum
-}
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# NXP LPC2148 ARM7TDMI-S with 512kB flash (12kB used by bootloader) and 40kB SRAM (8kB for USB DMA), clocked with 12MHz crystal
+
+source [find target/lpc2xxx.cfg]
 
+# parameters:
+# - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000
+# - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000
+
+proc setup_lpc2148 {core_freq_khz adapter_freq_khz} {
+       # 500kB flash and 32kB SRAM
+       # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
+       setup_lpc2xxx lpc2148 "0x3f0f0f0f 0x4f1f0f0f" 0x7d000 lpc2000_v2 0x8000 $core_freq_khz $adapter_freq_khz
+}
 
-# Default settings
 proc init_targets {} {
-       setup_lpc2148 lpc2148 "-expected-id 0x3f0f0f0f -expected-id 0x4f1f0f0f"
+       # default to core clocked with 12MHz crystal
+       echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
+
+       # setup_lpc2148 <core_freq_khz> <adapter_freq_khz>
+       setup_lpc2148 12000 1500
 }