target library: configuration files for openocd tested with Atmel SAM-ICE V6 JTAG.

[fw/openocd] / tcl / target / lm3s6965.cfg

diff --git a/tcl/target/lm3s6965.cfg b/tcl/target/lm3s6965.cfg
index 27b104ff786fd522ce5a65c4ee10e8cbc45d4eda..02d85d467aaf9cfd5d0188629c5b7141a39ab0cb 100644 (file)
--- a/tcl/target/lm3s6965.cfg
+++ b/tcl/target/lm3s6965.cfg
@@ -1,23 +1,14 @@
-# script for luminary lm3s6965
+# TI/Luminary Stellaris lm3s6965
 
-
-if { [info exists CHIPNAME] } {        
-   set  _CHIPNAME $CHIPNAME    
-} else {        
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
    set  _CHIPNAME lm3s6965
 }
 
-if { [info exists ENDIAN] } {  
-   set  _ENDIAN $ENDIAN    
-} else {        
-  # this defaults to a little endian
-   set  _ENDIAN little
-}
-
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
-  # force an error till we get a good number
    set _CPUTAPID 0x3ba00477
 }
 
@@ -36,11 +27,12 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT
 # the luminary variant causes a software reset rather than asserting SRST
 # this stops the debug registers from being cleared
 # this will be fixed in later revisions of silicon
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
 
-# 4k working area at base of ram
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0
+# 8k working area at base of ram, not backed up
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
 
 #flash configuration
-flash bank stellaris 0 0 0 0 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME