Common target file for Stellaris chips

[fw/openocd] / tcl / target / lm3s3748.cfg

diff --git a/tcl/target/lm3s3748.cfg b/tcl/target/lm3s3748.cfg
index 47cf72ef055b375496a13afe4d2ca4126f7a8f91..274377a7e89afaf899f67068d8c5764338620d46 100644 (file)
--- a/tcl/target/lm3s3748.cfg
+++ b/tcl/target/lm3s3748.cfg
@@ -1,18 +1,11 @@
 # TI/Luminary Stellaris lm3s3748
 
-if { [info exists CHIPNAME] } {        
-   set  _CHIPNAME $CHIPNAME    
-} else {        
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
    set  _CHIPNAME lm3s3748
 }
 
-if { [info exists ENDIAN] } {  
-   set  _ENDIAN $ENDIAN    
-} else {        
-  # this defaults to a little endian
-   set  _ENDIAN little
-}
-
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
@@ -26,11 +19,11 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT
 # parts (third generation, includes LM3S3748).  It keeps the debug registers
 # from being cleared, by using software reset not SRST; NOP on newer revs.
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN \
-       -chain-position $_TARGETNAME -variant lm3s
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
 
 # 8k working area at base of ram, not backed up
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
 
 # flash configuration -- one bank of 128K
-flash bank stellaris 0 0 0 0 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME