board: Add NXP LS1088ARDB

[fw/openocd] / tcl / target / klx.cfg

diff --git a/tcl/target/klx.cfg b/tcl/target/klx.cfg
index b41dbf78e5d1d71bdf142f25a6efc08f494ff8bc..84f6535e35ed7ae7484ddf03f31af245bb11aad7 100644 (file)
--- a/tcl/target/klx.cfg
+++ b/tcl/target/klx.cfg
@@ -26,9 +26,10 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -39,7 +40,7 @@ kinetis create_banks
 # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
 # specifies up to 1MHz for VLPR mode and up to 24MHz for run mode;
 # Table 17 of Sub-Family Data Sheet rev4 lists 25MHz as the maximum frequency.
-adapter_khz 1000
+adapter speed 1000
 
 reset_config srst_nogate
 
@@ -55,9 +56,9 @@ if {[using_hla]} {
    echo " it without mass erase. Don't set write protection on the first block."
    echo "!!!!!!!!!!!!!!!!!!!!!! WARNING !!!!!!!!!!!!!!!!! WARNING !!!!!!!!!!!!!!!!!!!!!!"
    echo ""
-} {
-   # Detect secured MCU or boot lock-up in RESET/WDOG loop
-   $_CHIPNAME.cpu configure -event examine-start {
+} else {
+   # Detect secured MCU
+   $_TARGETNAME configure -event examine-fail {
       kinetis mdm check_security
    }